mlsanityData to 14 Oct 2026

HDLdebugger: Streamlining HDL debugging with Large Language Models

arXiv 2403.11671 ↗First posted 18 Mar 2024cs.AR cs.AI cs.CEcited by 26

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Abstract (arXiv)

In the domain of chip design, Hardware Description Languages (HDLs) play a pivotal role. However, due to the complex syntax of HDLs and the limited availability of online resources, debugging HDL codes remains a difficult and time-intensive task, even for seasoned engineers. Consequently, there is a pressing need to develop automated HDL code debugging models, which can alleviate the burden on hardware engineers. Despite the strong capabilities of Large Language Models (LLMs) in generating, completing, and debugging software code, their utilization in the specialized field of HDL debugging has been limited and, to date, has not yielded satisfactory results. In this paper, we propose an LLM-assisted HDL debugging framework, namely HDLdebugger, which consists of HDL debugging data generation via a reverse engineering approach, a search engine for retrieval-augmented generation, and a retrieval-augmented LLM fine-tuning approach. Through the integration of these components, HDLdebugger can automate and streamline HDL debugging for chip design. Our comprehensive experiments, conducted on an HDL code dataset sourced from Huawei, reveal that HDLdebugger outperforms 13 cutting-edge LLM baselines, displaying exceptional effectiveness in HDL code debugging.

Key facts. Cited by 26 papers in the map (data through 14 Oct 2026). Builds on 31 of its 81 references that are in the map. First posted on arXiv 18 Mar 2024.

Builds on

31 of 81 references.

References · 31

  1. 2018BERT: Pre-training of Deep Bidirectional Transformers for Language Understandingcited by 40,399
  2. 2020Language Models are Few-Shot Learnerscited by 32,419
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  11. 2023Teaching Large Language Models to Self-Debugcited by 988
  12. 2023StarCoder: may the source be with you!cited by 799
19 more
  1. 2023WizardCoder: Empowering Code Large Language Models with Evol-Instructcited by 733
  2. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  3. 2023OpenChat: Advancing Open-source Language Models with Mixed-Quality Datacited by 252
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  12. 2019TBar: Revisiting Template-based Automated Program Repaircited by 65
  13. 2024Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTScited by 43
  14. 2021Neural Transfer Learning for Repairing Security Vulnerabilities in C Codecited by 36
  15. 2018Nopol: Automatic Repair of Conditional Statement Bugs in Java Programscited by 32
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Cited by year (2026 to 14 Oct)

Citing papers per year: 2024: 8; 2025: 10; 2026: 8.

26 papers.

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  1. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 84
  2. 2024RTLRewriter: Methodologies for Large Models aided RTL Code Optimizationcited by 31
  3. 2024Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QAcited by 28
  4. 2024LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trustcited by 20
  5. 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 15
  6. 2025RealBench: Benchmarking Verilog Generation Models with Real-World IP Designscited by 14
  7. 2024Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generationcited by 11
  8. 2025From Concept to Practice: an Automated LLM-aided UVM Machine for RTL Verificationcited by 9
  9. 2025Understanding and Mitigating Errors of LLM-Generated RTL Codecited by 8
  10. 2025ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflectioncited by 6
  11. 2025SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Modelscited by 6
  12. 2025HLSDebugger: Identification and Correction of Logic Bugs in HLS Code with LLM Solutionscited by 5
14 more
  1. 2024SemiKong: Curating, Training, and Evaluating A Semiconductor Industry-Specific Large Language Modelcited by 4
  2. 2026GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generationcited by 4
  3. 2024Classification-Based Automatic HDL Code Generation Using LLMscited by 3
  4. 2026Can Agents Secure Hardware? Evaluating Agentic LLM-Driven Obfuscation for IP Protectioncited by 3
  5. 2026HAVEN: Hybrid Automated Verification ENgine for UVM Testbench Synthesis with LLMscited by 2
  6. 2024IICPilot: An Intelligent Integrated Circuit Backend Design Framework Using Open EDAcited by 1
  7. 2025GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignmentcited by 1
  8. 2025HDLxGraph: Bridging Large Language Models and HDL Repositories via HDL Graph Databasescited by 1
  9. 2026Clover: A Neural-Symbolic Agentic Harness with Stochastic Tree-of-Thoughts for Verified RTL Repaircited by 1
  10. 2026VeriPilot: An LLM-Powered Verilog Debugging Frameworkcited by 1
  11. 2025DUET: Agentic Design Understanding via Experimentation and Testingcited by 0
  12. 2026SecureRAG-RTL: A Retrieval-Augmented, Multi-Agent, Zero-Shot LLM-Driven Framework for Hardware Vulnerability Detectioncited by 0
  13. 2026Agentic Electronic Design Automation: A Handoff Perspectivecited by 0
  14. 2026An Executable Benchmark for LLM-Based HLS Repair:Design Complexity and Repair Underconstraintcited by 0

Similar, not cited

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  1. 2025HDLCoRe: A Training-Free Framework for Mitigating Hallucinations in LLM-Generated HDL
  2. 2025CorrectHDL: Agentic HDL Design with LLMs Leveraging High-Level Synthesis as Reference
  3. 2025hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation
  4. 2024RTL-Breaker: Assessing the Security of LLMs against Backdoor Attacks on HDL Code Generation
  5. 2025Large Language Model for Verilog Code Generation: Literature Review and the Road Ahead
  6. 2026VHDLSuite: Unified Pipeline for LLM VHDL Generation with Data Synthesis and Evaluation
  7. 2025Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis
  8. 2024MetRex: A Benchmark for Verilog Code Metric Reasoning Using LLMs