mlsanityData to 14 Oct 2026

HLSDebugger: Identification and Correction of Logic Bugs in HLS Code with LLM Solutions

arXiv 2507.21485 ↗First posted 29 Jul 2025cs.SE cs.AIcited by 5

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Abstract (arXiv)

High-level synthesis (HLS) accelerates hardware design by enabling the automatic translation of high-level descriptions into efficient hardware implementations. However, debugging HLS code is a challenging and labor-intensive task, especially for novice circuit designers or software engineers without sufficient hardware domain knowledge. The recent emergence of Large Language Models (LLMs) is promising in automating the HLS debugging process. Despite the great potential, three key challenges persist when applying LLMs to HLS logic debugging: 1) High-quality circuit data for training LLMs is scarce, posing a significant challenge. 2) Debugging logic bugs in hardware is inherently more complex than identifying software bugs with existing golden test cases. 3) The absence of reliable test cases requires multi-tasking solutions, performing both bug identification and correction. complicates the multi-tasking required for effective HLS debugging. In this work, we propose a customized solution named HLSDebugger to address the challenges. HLSDebugger first generates and releases a large labeled dataset with 300K data samples, targeting HLS logic bugs. The HLSDebugger model adopts an encoder-decoder structure, performing bug location identification, bug type prediction, and bug correction with the same model. HLSDebugger significantly outperforms advanced LLMs like GPT-4 in bug identification and by more than 3x in bug correction. It makes a substantial advancement in the exploration of automated debugging of HLS code.

Key facts. Cited by 5 papers in the map (data through 14 Oct 2026). Builds on 19 of its 29 references that are in the map. First posted on arXiv 29 Jul 2025.

Builds on

19 of 29 references.

References · 19

  1. 2017Attention Is All You Needcited by 60,361
  2. 2023GPT-4 Technical Reportcited by 18,396
  3. 2023Mistral 7Bcited by 3,164
  4. 2023Code Llama: Open Foundation Models for Codecited by 2,139
  5. 2024DeepSeek-Coder: When the Large Language Model Meets Programming -- The Rise of Code Intelligencecited by 1,181
  6. 2024Gemma: Open Models Based on Gemini Research and Technologycited by 916
  7. 2021CodeT5: Identifier-aware Unified Pre-trained Encoder-Decoder Models for Code Understanding and Generationcited by 906
  8. 2024Debug like a Human: A Large Language Model Debugger via Verifying Runtime Execution Step-by-stepcited by 127
  9. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 100
  10. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 71
  11. 2024AgentFL: Scaling LLM-based Fault Localization to Project-Level Contextcited by 47
  12. 2024MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generationcited by 46
7 more
  1. 2024HDLdebugger: Streamlining HDL debugging with Large Language Modelscited by 26
  2. 2024HLSPilot: LLM-based High-Level Synthesiscited by 25
  3. 2024LLM4SecHW: Leveraging Domain Specific Large Language Model for Hardware Debuggingcited by 18
  4. 2024VerilogReader: LLM-Aided Hardware Test Generationcited by 17
  5. 2024CREF: An LLM-based Conversational Software Repair Framework for Programming Tutorscited by 15
  6. 2024C2HLSC: Can LLMs Bridge the Software-to-Hardware Design Gap?cited by 12
  7. 2024LLM-aided explanations of EDA synthesis errorscited by 3

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 2; 2026: 3.

5 papers.

  1. 2025FVDebug: An LLM-Driven Debugging Assistant for Automated Root Cause Analysis of Formal Verification Failurescited by 5
  2. 2025R3A: Reliable RTL Repair Framework with Multi-Agent Fault Localization and Stochastic Tree-of-Thoughts Patch Generationcited by 2
  3. 2026QiMeng-PRepair: Precise Code Repair via Edit-Aware Reward Optimizationcited by 2
  4. 2026Evidence-Driven LLM Agent for C-to-Synthesizable-C Conversion and Verificationcited by 1
  5. 2026An Executable Benchmark for LLM-Based HLS Repair:Design Complexity and Repair Underconstraintcited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2025HLSTester: Efficient Testing of Behavioral Discrepancies with LLMs for High-Level Synthesis ↗
  2. 2026VeriPilot: An LLM-Powered Verilog Debugging Framework
  3. 2025Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis
  4. 2024New Solutions on LLM Acceleration, Optimization, and Application
  5. 2025SAGE-HLS: Syntax-Aware AST-Guided LLM for High-Level Synthesis Code Generation
  6. 2025Large Language Model for Verilog Code Generation: Literature Review and the Road Ahead
  7. 2024MEIC: Re-thinking RTL Debug Automation using LLMs
  8. 2026LLM-based Hardware Development with Hierarchical IRs and End-to-End Multi-Agent Workflow