mlsanityData to 14 Oct 2026

RTL-Breaker: Assessing the Security of LLMs against Backdoor Attacks on HDL Code Generation

arXiv 2411.17569 ↗First posted 26 Nov 2024cs.CR cs.ARcited by 15

On the map: LLM safety and security → Backdoor and data poisoning attacks

Abstract (arXiv)

Large language models (LLMs) have demonstrated remarkable potential with code generation/completion tasks for hardware design. In fact, LLM-based hardware description language (HDL) code generation has enabled the industry to realize complex designs more quickly, reducing the time and effort required in the development cycle. However, the increased reliance on such automation introduces critical security risks. Notably, given that LLMs have to be trained on vast datasets of codes that are typically sourced from publicly available repositories (often without thorough validation), LLMs are susceptible to so-called data poisoning or backdoor attacks. Here, attackers inject malicious code for the training data, which can be carried over into the HDL code generated by LLMs. This threat vector can compromise the security and integrity of entire hardware systems. In this work, we propose RTL-Breaker, a novel backdoor attack framework on LLM-based HDL code generation. RTL-Breaker provides an in-depth analysis for essential aspects of this novel problem: 1) various trigger mechanisms versus their effectiveness for inserting malicious modifications, and 2) side-effects by backdoor attacks on code generation in general, i.e., impact on code quality. RTL-Breaker emphasizes the urgent need for more robust measures to safeguard against such attacks. Toward that end, we open-source our framework and all data.

Key facts. Cited by 15 papers in the map (data through 14 Oct 2026). Placed in Backdoor and data poisoning attacks, one of 12 directions in LLM safety and security. Builds on 26 of its 41 references that are in the map. First posted on arXiv 26 Nov 2024.

Builds on

26 of 41 references.

Closest ancestors · 3

Same direction, newest first

  1. 2024An LLM-Assisted Easy-to-Trigger Backdoor Attack on Code Completion Models: Injecting Disguised Vulnerabilities against Strong Detection10 Jun
  2. 2024Instruction Backdoor Attacks Against Customized LLMs14 Feb
  3. 2023A Comprehensive Overview of Backdoor Attacks in Large Language Models within Communication Networks28 Aug

Other references · 23

  1. 2023Llama 2: Open Foundation and Fine-Tuned Chat Modelscited by 13,028
  2. 2023Code Llama: Open Foundation Models for Codecited by 2,139
  3. 2022CodeGen: An Open Large Language Model for Code with Multi-Turn Program Synthesiscited by 885
  4. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  5. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 200
  6. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 174
  7. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 148
  8. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 140
  9. 2020You Autocomplete Me: Poisoning Vulnerabilities in Neural Code Completioncited by 131
  10. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 122
  11. 2023ChipGPT: How far are we from natural language hardware designcited by 105
  12. 2023AutoChip: Automating HDL Generation Using LLM Feedbackcited by 83
11 more
  1. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 71
  2. 2023GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Modelscited by 61
  3. 2023TrojanPuzzle: Covertly Poisoning Code-Suggestion Modelscited by 60
  4. 2023Understanding the Effectiveness of Large Language Models in Detecting Security Vulnerabilitiescited by 59
  5. 2024AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Designcited by 41
  6. 2024AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMscited by 31
  7. 2024LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trustcited by 20
  8. 2024LLM-Aided Testbench Generation and Bug Detection for Finite-State Machinescited by 17
  9. 2023Exploring the Limits of ChatGPT in Software Security Applicationscited by 6
  10. 2020Hardware Security for and beyond CMOS Technologycited by 4
  11. 2024SENTAUR: Security EnhaNced Trojan Assessment Using LLMs Against Undesirable Revisionscited by 4

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 6; 2026: 9.

15 papers.

Sort:

By area:

Similar, not cited

Close in wording, no citation either way

  1. 2026RTLGuard: A Lightweight Teacher-Student Defense for Poisoned RTL Code Generation Models ↗
  2. 2026SecureRAG-RTL: A Retrieval-Augmented, Multi-Agent, Zero-Shot LLM-Driven Framework for Hardware Vulnerability Detection
  3. 2025HDLCoRe: A Training-Free Framework for Mitigating Hallucinations in LLM-Generated HDL
  4. 2026HarmChip: Evaluating Hardware Security Centric LLM Safety via Jailbreak Benchmarking
  5. 2026FloatDoor: Platform-Triggered Backdoors in LLMs
  6. 2025Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis
  7. 2026LLM4RTL: Tool-Assisted LLM for RTL Generation
  8. 2025hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation