mlsanityData to 7 Oct 2026

Machine Learning for Electronic Design Automation: A Survey

arXiv 2102.03357 ↗First posted 10 Jan 2021eess.SP cs.AI cs.LGcited by 71

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Abstract (arXiv)

With the down-scaling of CMOS technology, the design complexity of very large-scale integrated (VLSI) is increasing. Although the application of machine learning (ML) techniques in electronic design automation (EDA) can trace its history back to the 90s, the recent breakthrough of ML and the increasing complexity of EDA tasks have aroused more interests in incorporating ML to solve EDA tasks. In this paper, we present a comprehensive review of existing ML for EDA studies, organized following the EDA hierarchy.

Key facts. Cited by 71 papers in the map (data through 7 Oct 2026). Builds on 27 of its 186 references that are in the map. First posted on arXiv 10 Jan 2021.

Builds on

27 of 186 references.

References · 27

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  10. 2020Chip Placement with Deep Reinforcement Learningcited by 83
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15 more
  1. 2019DRiLLS: Deep Reinforcement Learning for Logic Synthesiscited by 47
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  3. 2018Can Neural Networks Understand Logical Entailment?cited by 24
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Cited by year (2026 to 7 Oct)

Citing papers per year: 2021: 5; 2022: 12; 2023: 13; 2024: 15; 2025: 16; 2026: 10.

71 papers.

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  1. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 143
  2. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 136
  3. 2021DeepGate: Learning Neural Representations of Logic Gatescited by 37
  4. 2021OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesiscited by 30
  5. 2025DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysiscited by 21
  6. 2024Offline Model-Based Optimization via Policy-Guided Gradient Searchcited by 19
  7. 2021BOiLS: Bayesian Optimisation for Logic Synthesiscited by 18
  8. 2025HDLCoRe: A Training-Free Framework for Mitigating Hallucinations in LLM-Generated HDLcited by 17
  9. 2022Adaptive and Dynamic Multi-Resolution Hashing for Pairwise Summationscited by 14
  10. 2024VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL Code Generationcited by 14
  11. 2022Pretraining Graph Neural Networks for few-shot Analog Circuit Modeling and Designcited by 13
  12. 2024Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithmscited by 12
38 more
  1. 2022CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)cited by 10
  2. 2024Cross-Modality Program Representation Learning for Electronic Design Automation with High-Level Synthesiscited by 10
  3. 2025Revolution or Hype? Seeking the Limits of Large Models in Hardware Designcited by 9
  4. 2025VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generationcited by 8
  5. 2023DeepSeq: Deep Sequential Circuit Learningcited by 7
  6. 2023A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Designcited by 6
  7. 2022AI/ML Algorithms and Applications in VLSI Design and Technologycited by 5
  8. 2024Circuit Transformer: A Transformer That Preserves Logical Equivalencecited by 5
  9. 2025DesignX: Human-Competitive Algorithm Designer for Black-Box Optimizationcited by 5
  10. 2022Towards Machine Learning for Placement and Routing in Chip Design: a Methodological Overviewcited by 4
  11. 2023From Words to Wires: Generating Functioning Electronic Devices from Natural Language Descriptionscited by 4
  12. 2023Accelerating Exact Combinatorial Optimization via RL-based Initialization -- A Case Study in Schedulingcited by 4
  13. 2024Logic Synthesis with Generative Deep Neural Networkscited by 4
  14. 2025DecoRTL: A Run-time Decoding Framework for RTL Code Generation with LLMscited by 4
  15. 2021VeRLPy: Python Library for Verification of Digital Designs with Reinforcement Learningcited by 3
  16. 2022Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICscited by 3
  17. 2024The Graph's Apprentice: Teaching an LLM Low Level Knowledge for Circuit Quality Estimationcited by 3
  18. 2024OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine Learning Tasks in Logic Synthesiscited by 3
  19. 2023Pushing the Limits of Machine Design: Automated CPU Design with AIcited by 2
  20. 2023EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Researchcited by 2
  21. 2024AutoHLS: Learning to Accelerate Design Space Exploration for HLS Designscited by 2
  22. 2024ShortCircuit: AlphaZero-Driven Circuit Designcited by 2
  23. 2024MTLSO: A Multi-Task Learning Approach for Logic Synthesis Optimizationcited by 2
  24. 2026OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generationcited by 2
  25. 2022Towards Collaborative Intelligence: Routability Estimation based on Decentralized Private Datacited by 1
  26. 2022A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automationcited by 1
  27. 2022Process, Bias and Temperature Scalable CMOS Analog Computing Circuits for Machine Learningcited by 1
  28. 2022HybMT: Hybrid Meta-Predictor based ML Algorithm for Fast Test Vector Generationcited by 1
  29. 2024Natural Language to Verilog: Design of a Recurrent Spiking Neural Network using Large Language Models and ChatGPTcited by 1
  30. 2024Logic Synthesis Optimization with Predictive Self-Supervision via Causal Transformerscited by 1
  31. 2024CktGen: Automated Analog Circuit Design with Generative Artificial Intelligencecited by 1
  32. 2025Review of Machine Learning for Micro-Electronic Design Verificationcited by 1
  33. 2025Customizing a Large Language Model for VHDL Design of High-Performance Microprocessorscited by 1
  34. 2025FuncGNN: Learning Functional Semantics of Logic Circuits with Graph Neural Networkscited by 1
  35. 2025Graph Neural Networks for Automatic Addition of Optimizing Components in Printed Circuit Board Schematicscited by 1
  36. 2025SAND: A Self-supervised and Adaptive NAS-Driven Framework for Hardware Trojan Detectioncited by 1
  37. 2025BDD2Seq: Enabling Scalable Reversible-Circuit Synthesis via Graph-to-Sequence Learningcited by 1
  38. 2026CTS-Bench: Benchmarking Graph Coarsening Trade-offs for GNNs in Clock Tree Synthesiscited by 1

50 most cited of 71 All 71 (JSON)