mlsanityData to 7 Oct 2026

The Graph's Apprentice: Teaching an LLM Low Level Knowledge for Circuit Quality Estimation

arXiv 2411.00843 ↗First posted 30 Oct 2024cs.LG cs.AI cs.ARcited by 3

Not on the map. Why?

Abstract (arXiv)

Logic synthesis is a crucial phase in the circuit design process, responsible for transforming hardware description language (HDL) designs into optimized netlists. However, traditional logic synthesis methods are computationally intensive, restricting their iterative use in refining chip designs. Recent advancements in large language models (LLMs), particularly those fine-tuned on programming languages, present a promising alternative. This work proposes augmenting LLMs with predictor networks trained to estimate circuit quality directly from HDL code. To enhance performance, the model is regularized using embeddings from graph neural networks (GNNs) trained on Look-Up Table (LUT) graphs, thereby incorporating lower-level circuit insights. The proposed method demonstrates superior performance compared to existing graph-based RTL-level estimation techniques on the established benchmark OpenABCD, while providing instant feedback on HDL code quality.

Key facts. Cited by 3 papers in the map (data through 7 Oct 2026). Builds on 41 of its 59 references that are in the map. First posted on arXiv 30 Oct 2024.

Builds on

41 of 59 references.

References · 41

  1. 2020Language Models are Few-Shot Learnerscited by 32,199
  2. 2022Training language models to follow instructions with human feedbackcited by 15,712
  3. 2023LLaMA: Open and Efficient Foundation Language Modelscited by 13,958
  4. 2016Semi-Supervised Classification with Graph Convolutional Networkscited by 11,282
  5. 2021Evaluating Large Language Models Trained on Codecited by 8,053
  6. 2016SGDR: Stochastic Gradient Descent with Warm Restartscited by 4,993
  7. 2023Code Llama: Open Foundation Models for Codecited by 2,105
  8. 2020CodeBERT: A Pre-Trained Model for Programming and Natural Languagescited by 1,286
  9. 2024DeepSeek-Coder: When the Large Language Model Meets Programming -- The Rise of Code Intelligencecited by 1,154
  10. 2021CodeT5: Identifier-aware Unified Pre-trained Encoder-Decoder Models for Code Understanding and Generationcited by 890
  11. 2022CodeGen: An Open Large Language Model for Code with Multi-Turn Program Synthesiscited by 876
  12. 2021QA-GNN: Reasoning with Language Models and Knowledge Graphs for Question Answeringcited by 386
29 more
  1. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 246
  2. 2023GraphGPT: Graph Instruction Tuning for Large Language Modelscited by 223
  3. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 197
  4. 2022GreaseLM: Graph REASoning Enhanced Language Models for Question Answeringcited by 170
  5. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 168
  6. 2022Deep Bidirectional Language-Knowledge Graph Pretrainingcited by 156
  7. 2021GraphFormers: GNN-nested Transformers for Representation Learning on Textual Graphcited by 143
  8. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 143
  9. 2023MolCA: Molecular Graph-Language Modeling with Cross-Modal Projector and Uni-Modal Adaptercited by 128
  10. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 118
  11. 2022Benchmarking Large Language Models for Automated Verilog RTL Code Generationcited by 112
  12. 2023GraphLLM: Boosting Graph Reasoning Ability of Large Language Modelcited by 105
  13. 2024BetterV: Controlled Verilog Generation with Discriminative Guidancecited by 99
  14. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 98
  15. 2023InstructMol: Multi-Modal Integration for Building a Versatile and Reliable Molecular Assistant in Drug Discoverycited by 86
  16. 2023GIT-Mol: A Multi-modal Large Language Model for Molecular Science with Graph, Image, and Textcited by 82
  17. 2021Machine Learning for Electronic Design Automation: A Surveycited by 71
  18. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 69
  19. 2023A Survey of Large Language Models for Code: Evolution, Benchmarking, and Future Trendscited by 66
  20. 2020Measuring the Algorithmic Efficiency of Neural Networkscited by 51
  21. 2023Patton: Language Model Pretraining on Text-Rich Networkscited by 49
  22. 2024Algorithmic progress in language modelscited by 31
  23. 2021OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesiscited by 30
  24. 2023Train Your Own GNN Teacher: Graph-Aware Distillation on Textual Graphscited by 29
  25. 2023MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Designcited by 19
  26. 2023Pretraining Language Models with Text-Attributed Heterogeneous Graphscited by 15
  27. 2022Algorithmic progress in computer visioncited by 13
  28. 2021Measuring Progress in Deep Reinforcement Learning Sample Efficiencycited by 8
  29. 2024Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimizationcited by 6

Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2025: 2; 2026: 1.

3 papers.

  1. 2025VeriLoC: Line-of-Code Level Prediction of Hardware Design Quality from Verilog Codecited by 3
  2. 2025Beyond Tokens: Enhancing RTL Quality Estimation via Structural Graph Learningcited by 1
  3. 2026UniRTL: Unifying Code and Graph for Robust RTL Representation Learningcited by 0