Cross-Modality Program Representation Learning for Electronic Design Automation with High-Level Synthesis
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Abstract (arXiv)
In recent years, domain-specific accelerators (DSAs) have gained popularity for applications such as deep learning and autonomous driving. To facilitate DSA designs, programmers use high-level synthesis (HLS) to compile a high-level description written in C/C++ into a design with low-level hardware description languages that eventually synthesize DSAs on circuits. However, creating a high-quality HLS design still demands significant domain knowledge, particularly in microarchitecture decisions expressed as textitpragmas. Thus, it is desirable to automate such decisions with the help of machine learning for predicting the quality of HLS designs, requiring a deeper understanding of the program that consists of original code and pragmas. Naturally, these programs can be considered as sequence data. In addition, these programs can be compiled and converted into a control data flow graph (CDFG). But existing works either fail to leverage both modalities or combine the two in shallow or coarse ways. We propose ProgSG, a model that allows interaction between the source code sequence modality and the graph modality in a deep and fine-grained way. To alleviate the scarcity of labeled designs, a pre-training method is proposed based on a suite of compiler's data flow analysis tasks. Experimental results show that ProgSG reduces the RMSE of design performance predictions by up to 22%, and identifies designs with an average of 1.10× and 1.26× (up to 8.17× and 13.31×) performance improvement in design space exploration (DSE) task compared to HARP and AutoDSE, respectively.
Key facts. Cited by 10 papers in the map (data through 14 Oct 2026). Builds on 43 of its 73 references that are in the map. First posted on arXiv 13 Jun 2024.
Builds on
43 of 73 references.
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Built on by
Citing papers per year: 2025: 5; 2026: 5.
10 papers.
- 2025LLM-DSE: Searching Accelerator Parameters with LLM Agentscited by 10
- 2025LIFT: LLM-Based Pragma Insertion for HLS via GNN Supervised Fine-Tuningcited by 8
- 2025Iceberg: Enhancing HLS Modeling with Synthetic Datacited by 1
- 2026MPM-LLM4DSE: Reaching the Pareto Frontier in HLS with Multimodal Learning and LLM-Driven Explorationcited by 1
- 2026Report for NSF Workshop on AI for Electronic Design Automationcited by 1
- 2026Agent Factories for High Level Synthesis: How Far Can General-Purpose Coding Agents Go in Hardware Optimization?cited by 1
- 2025SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuitscited by 0
- 2025Unsupervised Graph Neural Network Framework for Balanced Multipatterning in Advanced Electronic Design Automation Layoutscited by 0
- 2026DiffHLS: Differential Learning for High-Level Synthesis QoR Prediction with GNNs and LLM Code Embeddingscited by 0
- 2026Agentic Electronic Design Automation: A Handoff Perspectivecited by 0
- 2026Agentic Electronic Design Automation: A Handoff Perspective18 Jun 2026
- 2026DiffHLS: Differential Learning for High-Level Synthesis QoR Prediction with GNNs and LLM Code Embeddings10 Apr 2026
- 2026Agent Factories for High Level Synthesis: How Far Can General-Purpose Coding Agents Go in Hardware Optimization?26 Mar 2026
- 2026Report for NSF Workshop on AI for Electronic Design Automation20 Jan 2026
- 2026MPM-LLM4DSE: Reaching the Pareto Frontier in HLS with Multimodal Learning and LLM-Driven Exploration8 Jan 2026
- 2025Unsupervised Graph Neural Network Framework for Balanced Multipatterning in Advanced Electronic Design Automation Layouts20 Nov 2025
- 2025SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits26 Aug 2025
- 2025Iceberg: Enhancing HLS Modeling with Synthetic Data14 Jul 2025
- 2025LLM-DSE: Searching Accelerator Parameters with LLM Agents18 May 2025
- 2025LIFT: LLM-Based Pragma Insertion for HLS via GNN Supervised Fine-Tuning29 Apr 2025