ShortCircuit: AlphaZero-Driven Circuit Design
Not on the map. Why?
Abstract (arXiv)
Chip design relies heavily on generating Boolean circuits, such as AND-Inverter Graphs (AIGs), from functional descriptions like truth tables. This generation operation is a key process in logic synthesis, a primary chip design stage. While recent advances in deep learning have aimed to accelerate circuit design, these efforts have mostly focused on tasks other than synthesis, and traditional heuristic methods have plateaued. In this paper, we introduce ShortCircuit, a novel transformer-based architecture that leverages the structural properties of AIGs and performs efficient space exploration. Contrary to prior approaches attempting end-to-end generation of logic circuits using deep networks, ShortCircuit employs a two-phase process combining supervised with reinforcement learning to enhance generalization to unseen truth tables. We also propose an AlphaZero variant to handle the double exponentially large state space and the reward sparsity, enabling the discovery of near-optimal designs. To evaluate the generative performance of our model , we extract 500 truth tables from a set of 20 real-world circuits. ShortCircuit successfully generates AIGs for 98% of the 8-input test truth tables, and outperforms the state-of-the-art logic synthesis tool, ABC, by 18.62% in terms of circuits size.
Key facts. Cited by 2 papers in the map (data through 14 Oct 2026). Builds on 11 of its 42 references that are in the map. First posted on arXiv 19 Aug 2024.
Builds on
11 of 42 references.
References · 11
- 2018BERT: Pre-training of Deep Bidirectional Transformers for Language Understandingcited by 40,399
- 2020Scaling Laws for Neural Language Modelscited by 6,586
- 2017Mastering Chess and Shogi by Self-Play with a General Reinforcement Learning Algorithmcited by 734
- 2021Machine Learning for Electronic Design Automation: A Surveycited by 72
- 2023CktGNN: Circuit Graph Neural Network for Electronic Design Automationcited by 58
- 2019DRiLLS: Deep Reinforcement Learning for Logic Synthesiscited by 47
- 2018Developing Synthesis Flows Without Human Knowledgecited by 29
- 2021Differentiable Logic Machinescited by 18
- 2021BOiLS: Bayesian Optimisation for Logic Synthesiscited by 18
- 2022LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Modelscited by 7
- 2022Neural Combinatorial Logic Circuit Synthesis from Input-Output Examplescited by 1
Built on by
Citing papers per year: 2025: 2.
2 papers.
Similar, not cited
Close in wording, no citation either way
- 2024Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization
- 2023INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search
- 2026AstRL: Analog and Mixed-Signal Circuit Synthesis with Deep Reinforcement Learning
- 2024GraCo -- A Graph Composer for Integrated Circuits
- 2024Logic Synthesis Optimization with Predictive Self-Supervision via Causal Transformers
- 2024CircuitVAE: Efficient and Scalable Latent Circuit Optimization
- 2025AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation
- 2025DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale