DeepSeq: Deep Sequential Circuit Learning
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Abstract (arXiv)
Circuit representation learning is a promising research direction in the electronic design automation (EDA) field. With sufficient data for pre-training, the learned general yet effective representation can help to solve multiple downstream EDA tasks by fine-tuning it on a small set of task-related data. However, existing solutions only target combinational circuits, significantly limiting their applications. In this work, we propose DeepSeq, a novel representation learning framework for sequential netlists. Specifically, we introduce a dedicated graph neural network (GNN) with a customized propagation scheme to exploit the temporal correlations between gates in sequential circuits. To ensure effective learning, we propose to use a multi-task training objective with two sets of strongly related supervision: logic probability and transition probability at each node. A novel dual attention aggregation mechanism is introduced to facilitate learning both tasks efficiently. Experimental results on various benchmark circuits show that DeepSeq outperforms other GNN models for sequential circuit learning. We evaluate the generalization capability of DeepSeq on a downstream power estimation task. After fine-tuning, DeepSeq can accurately estimate power across various circuits under different workloads.
Key facts. Cited by 7 papers in the map (data through 7 Oct 2026). Builds on 13 of its 28 references that are in the map. First posted on arXiv 27 Feb 2023.
Builds on
13 of 28 references.
References · 13
- 2016Semi-Supervised Classification with Graph Convolutional Networkscited by 11,282
- 2017Graph Attention Networkscited by 8,854
- 2017Inductive Representation Learning on Large Graphscited by 6,284
- 2021Pre-Trained Models: Past, Present and Futurecited by 319
- 2018Large-Scale Learnable Graph Convolutional Networkscited by 113
- 2019D-VAE: A Variational Autoencoder for Directed Acyclic Graphscited by 98
- 2021Machine Learning for Electronic Design Automation: A Surveycited by 71
- 2021Directed Acyclic Graph Neural Networkscited by 70
- 2021DeepGate: Learning Neural Representations of Logic Gatescited by 37
- 2022PACE: A Parallelizable Computation Encoder for Directed Acyclic Graphscited by 20
- 2022PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNscited by 10
- 2022DeepTPI: Test Point Insertion with Deep Reinforcement Learningcited by 10
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Citing papers per year: 2024: 2; 2025: 5.
7 papers.
- 2024DeepGate3: Towards Scalable Circuit Representation Learningcited by 26
- 2025DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysiscited by 21
- 2025DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scalecited by 12
- 2025NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graphcited by 9
- 2024DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representationscited by 5
- 2025DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learningcited by 3
- 2025Modeling Relational Logic Circuits for And-Inverter Graph Convolutional Networkcited by 0
- 2025Modeling Relational Logic Circuits for And-Inverter Graph Convolutional Network16 Aug 2025
- 2025NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph12 Apr 2025
- 2025DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis25 Feb 2025
- 2025DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learning5 Feb 2025
- 2025DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale2 Feb 2025
- 2024DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations1 Nov 2024
- 2024DeepGate3: Towards Scalable Circuit Representation Learning15 Jul 2024