BagNet: Berkeley Analog Generator with Layout Optimizer Boosted with Deep Neural Networks
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Abstract (arXiv)
The discrepancy between post-layout and schematic simulation results continues to widen in analog design due in part to the domination of layout parasitics. This paradigm shift is forcing designers to adopt design methodologies that seamlessly integrate layout effects into the standard design flow. Hence, any simulation-based optimization framework should take into account time-consuming post-layout simulation results. This work presents a learning framework that learns to reduce the number of simulations of evolutionary-based combinatorial optimizers, using a DNN that discriminates against generated samples, before running simulations. Using this approach, the discriminator achieves at least two orders of magnitude improvement on sample efficiency for several large circuit examples including an optical link receiver layout.
Key facts. Cited by 11 papers in the map (data through 14 Oct 2026). First posted on arXiv 23 Jul 2019.
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Citing papers per year: 2021: 2; 2022: 4; 2023: 1; 2024: 1; 2025: 2; 2026: 1.
11 papers.
- 2021Machine Learning for Electronic Design Automation: A Surveycited by 72
- 2021A Survey of Machine Learning for Computer Architecture and Systemscited by 53
- 2022Pretraining Graph Neural Networks for few-shot Analog Circuit Modeling and Designcited by 13
- 2024AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Designcited by 9
- 2025Supervised Learning for Analog and RF Circuit Design: Benchmarks and Comparative Insightscited by 5
- 2022A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automationcited by 1
- 2023Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networkscited by 1
- 2025Emerging ML-AI Techniques for Analog and RF EDAcited by 1
- 2022The Dark Side: Security Concerns in Machine Learning for EDAcited by 0
- 2022Intelligent Circuit Design and Implementation with Machine Learningcited by 0
- 2026Lighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset Pointscited by 0
- 2026Lighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset Points15 Jul 2026
- 2025Emerging ML-AI Techniques for Analog and RF EDA12 May 2025
- 2025Supervised Learning for Analog and RF Circuit Design: Benchmarks and Comparative Insights21 Jan 2025
- 2024AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Design22 Jul 2024
- 2023Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks27 Nov 2023
- 2022Intelligent Circuit Design and Implementation with Machine Learning7 Jun 2022
- 2022A Survey and Perspective on Artificial Intelligence for Security-Aware Electronic Design Automation19 Apr 2022
- 2022Pretraining Graph Neural Networks for few-shot Analog Circuit Modeling and Design29 Mar 2022
- 2022The Dark Side: Security Concerns in Machine Learning for EDA20 Mar 2022
- 2021A Survey of Machine Learning for Computer Architecture and Systems16 Feb 2021
- 2021Machine Learning for Electronic Design Automation: A Survey10 Jan 2021