mlsanityData to 14 Oct 2026

Revolution or Hype? Seeking the Limits of Large Models in Hardware Design

arXiv 2509.04905 ↗First posted 5 Sep 2025cs.LGcited by 9

Not on the map. Why?

Abstract (arXiv)

Recent breakthroughs in Large Language Models (LLMs) and Large Circuit Models (LCMs) have sparked excitement across the electronic design automation (EDA) community, promising a revolution in circuit design and optimization. Yet, this excitement is met with significant skepticism: Are these AI models a genuine revolution in circuit design, or a temporary wave of inflated expectations? This paper serves as a foundational text for the corresponding ICCAD 2025 panel, bringing together perspectives from leading experts in academia and industry. It critically examines the practical capabilities, fundamental limitations, and future prospects of large AI models in hardware design. The paper synthesizes the core arguments surrounding reliability, scalability, and interpretability, framing the debate on whether these models can meaningfully outperform or complement traditional EDA methods. The result is an authoritative overview offering fresh insights into one of today's most contentious and impactful technology trends.

Key facts. Cited by 9 papers in the map (data through 14 Oct 2026). Builds on 39 of its 51 references that are in the map. First posted on arXiv 5 Sep 2025.

Builds on

39 of 51 references.

References · 39

  1. 2025The Illusion of Thinking: Understanding the Strengths and Limitations of Reasoning Models via the Lens of Problem Complexitycited by 302
  2. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 174
  3. 2023ChipGPT: How far are we from natural language hardware designcited by 105
  4. 2025Measuring the Impact of Early-2025 AI on Experienced Open-Source Developer Productivitycited by 101
  5. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 100
  6. 2024BetterV: Controlled Verilog Generation with Discriminative Guidancecited by 100
  7. 2024VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Toolcited by 85
  8. 2023AutoChip: Automating HDL Generation Using LLM Feedbackcited by 83
  9. 2024Transformers Can Do Arithmetic with the Right Embeddingscited by 78
  10. 2021Machine Learning for Electronic Design Automation: A Surveycited by 72
  11. 2024Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generationcited by 45
  12. 2025Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verificationcited by 44
27 more
  1. 2022MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learningcited by 43
  2. 2025Is Chain-of-Thought Reasoning of LLMs a Mirage? A Data Distribution Lenscited by 43
  3. 2024AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Designcited by 41
  4. 2025A Survey of Research in Large Language Models for Electronic Design Automationcited by 41
  5. 2021DeepGate: Learning Neural Representations of Logic Gatescited by 37
  6. 2024RTLRewriter: Methodologies for Large Models aided RTL Code Optimizationcited by 31
  7. 2024AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMscited by 31
  8. 2024Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QAcited by 28
  9. 2024DeepGate3: Towards Scalable Circuit Representation Learningcited by 26
  10. 2024MEIC: Re-thinking RTL Debug Automation using LLMscited by 25
  11. 2024CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Designcited by 24
  12. 2025DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Modelcited by 23
  13. 2025DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysiscited by 21
  14. 2024UVLLM: An Automated Universal RTL Verification Framework using LLMscited by 17
  15. 2024AssertionBench: A Benchmark to Evaluate Large-Language Models for Assertion Generationcited by 16
  16. 2024DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agentcited by 15
  17. 2025CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Designcited by 14
  18. 2024The Dawn of AI-Native EDA: Opportunities and Challenges of Large Circuit Modelscited by 12
  19. 2025VeriDebug: A Unified LLM for Verilog Debugging via Contrastive Embedding and Guided Correctioncited by 12
  20. 2025DeepRTL2: A Versatile Model for RTL-Related Taskscited by 10
  21. 2025FIXME: Towards End-to-End Benchmarking of LLM-Aided Design Verificationcited by 9
  22. 2025ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDAcited by 8
  23. 2024SynthAI: A Multi Agent Generative AI Framework for Automated Modular HLS Design Generationcited by 6
  24. 2025ChatModel: Automating Reference Model Design and Verification with LLMscited by 6
  25. 2025DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learningcited by 3
  26. 2025Improving LLM-Powered EDA Assistants with RAFTcited by 2
  27. 2025Customizing a Large Language Model for VHDL Design of High-Performance Microprocessorscited by 1

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 3; 2026: 6.

9 papers.

  1. 2025TokenPowerBench: Benchmarking the Power Consumption of LLM Inferencecited by 22
  2. 2025ChipMind: Retrieval-Augmented Reasoning for Long-Context Circuit Design Specificationscited by 4
  3. 2026HAVEN: Hybrid Automated Verification ENgine for UVM Testbench Synthesis with LLMscited by 2
  4. 2026Agentic Agile-V: From Vibe Coding to Verified Engineering in Software and Hardware Developmentcited by 2
  5. 2025David vs. Goliath: Can Small Models Win Big with Agentic AI in Hardware Design?cited by 1
  6. 2026Saarthi for AGI: Towards Domain-Specific General Intelligence for Formal Verificationcited by 1
  7. 2026LLMs in Digital EDA: A perspective on shifting roles from Generation to Orchestrationcited by 1
  8. 2026Agentic Electronic Design Automation: A Handoff Perspectivecited by 0
  9. 2026LLM for EDA in Front-End Design: Challenges and Opportunitiescited by 0