mlsanityData to 14 Oct 2026

DiffLUT-Net: Differentiable Training of FPGA LUT Networks with Learnable Connectivity

arXiv 2609.09254 ↗First posted 8 Sep 2026cs.LG cs.AI cs.ARcited by 0

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Abstract (arXiv)

Field-programmable gate arrays (FPGAs) enable efficient neural-network inference, but most deployment flows either accelerate multiply-accumulate operations or convert pretrained quantized models into lookup tables (LUTs). We present DiffLUT-Net, an FPGA-native network connected by six-input LUTs that are trained from scratch. We jointly learn the 64 truth-table entries of a LUT and the source to each of its six input ports using a differentiable LUT function relaxation and hardware source selection. After training, the truth tables and connections are discretized, unused logic can be pruned, and the network is exported directly as synthesizable Verilog. Across five benchmarks, DiffLUT-Net achieves favorable accuracy-resource trade-offs. These results demonstrate the effectiveness of jointly learning LUT functions and sparse connectivity for compact FPGA-native inference. The code is available at https://github.com/TUDa-HWAI/DiffLUT-Network.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 29 of its 34 references that are in the map. First posted on arXiv 8 Sep 2026.

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29 of 34 references.

References · 29

  1. 2017Fashion-MNIST: a Novel Image Dataset for Benchmarking Machine Learning Algorithmscited by 4,349
  2. 2016FINN: A Framework for Fast, Scalable Binarized Neural Network Inferencecited by 150
  3. 2018Fast inference of deep neural networks in FPGAs for particle physicscited by 133
  4. 2022Deep Differentiable Logic Gate Networkscited by 67
  5. 2021hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devicescited by 62
  6. 2020LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applicationscited by 57
  7. 2020Compressing deep neural networks on FPGAs to binary and ternary precision with HLS4MLcited by 42
  8. 2024Basis Sharing: Cross-Layer Parameter Sharing for Large Language Model Compressioncited by 35
  9. 2023PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inferencecited by 30
  10. 2024Differentiable Weightless Neural Networkscited by 28
  11. 2024NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functionscited by 21
  12. 2025TreeLUT: An Efficient Alternative to Deep Neural Networks for Inference Acceleration Using Gradient Boosted Decision Treescited by 15
17 more
  1. 2025NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inferencecited by 14
  2. 2025KANEL'E: Kolmogorov-Arnold Networks for Efficient LUT-based Evaluationcited by 13
  3. 2024PolyLUT-Add: FPGA-based LUT Inference with Wide Inputscited by 12
  4. 2022Class-based Quantization for Neural Networkscited by 9
  5. 2023Class-Aware Pruning for Efficient Neural Networkscited by 9
  6. 2025Light Differentiable Logic Gate Networkscited by 9
  7. 2023PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Accelerationcited by 8
  8. 2023Early-Exit with Class Exclusion for Efficient Inference of Neural Networkscited by 8
  9. 2025da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAscited by 8
  10. 2025WARP-LUTs -- Walsh-Assisted Relaxation for Probabilistic Look Up Tablescited by 6
  11. 2025LILogic Net: Compact Logic Gate Networks with Learnable Connectivity for Efficient Hardware Deploymentcited by 6
  12. 2023OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillationcited by 5
  13. 2023Logic Design of Neural Networks for High-Throughput and Low-Power Applicationscited by 4
  14. 2025SparseLUT: Sparse Connectivity Optimization for Lookup Table-based Deep Neural Networkscited by 2
  15. 2026Fully Trainable Deep Differentiable Logic Gate Networks and Lookup Table Networkscited by 2
  16. 2026BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networkscited by 1
  17. 2026FPGN: Redefining Ultra-Fast Programmable Gate-based Neural Acceleration with Differentiable LUTscited by 1

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  1. 2026HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference
  2. 2024Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision
  3. 2025LL-ViT: Edge Deployable Vision Transformers with Look Up Table Neurons
  4. 2026Resource Utilization of Differentiable Logic Gate Networks Deployed on FPGAs
  5. 2023Design and Optimization of Residual Neural Network Accelerators for Low-Power FPGAs Using High-Level Synthesis ↗
  6. 2025Energy-Efficient FPGA Framework for Non-Quantized Convolutional Neural Networks
  7. 2026CascadeLUT: Information-Ordered Streaming Inference for Bandwidth-Constrained FPGAs
  8. 2021Fast convolutional neural networks on FPGAs with hls4ml