hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devices
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Abstract (arXiv)
Accessible machine learning algorithms, software, and diagnostic tools for energy-efficient devices and systems are extremely valuable across a broad range of application domains. In scientific domains, real-time near-sensor processing can drastically improve experimental design and accelerate scientific discoveries. To support domain scientists, we have developed hls4ml, an open-source software-hardware codesign workflow to interpret and translate machine learning algorithms for implementation with both FPGA and ASIC technologies. We expand on previous hls4ml work by extending capabilities and techniques towards low-power implementations and increased usability: new Python APIs, quantization-aware pruning, end-to-end FPGA workflows, long pipeline kernels for low power, and new device backends include an ASIC workflow. Taken together, these and continued efforts in hls4ml will arm a new generation of domain scientists with accessible, efficient, and powerful tools for machine-learning-accelerated discovery.
Key facts. Cited by 61 papers in the map (data through 7 Oct 2026). Builds on 38 of its 83 references that are in the map. First posted on arXiv 9 Mar 2021.
Builds on
38 of 83 references.
References · 38
- 2015Batch Normalization: Accelerating Deep Network Training by Reducing Internal Covariate Shiftcited by 6,979
- 2015Deep Compression: Compressing Deep Neural Networks with Pruning, Trained Quantization and Huffman Codingcited by 2,291
- 2015Learning both Weights and Connections for Efficient Neural Networkscited by 1,998
- 2016XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networkscited by 829
- 2020What is the State of Neural Network Pruning?cited by 578
- 2015BinaryConnect: Training Deep Neural Networks with binary weights during propagationscited by 571
- 2017Learning Sparse Neural Networks through L0 Regularizationcited by 571
- 2016Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activationscited by 413
- 2019HAWQ: Hessian AWare Quantization of Neural Networks with Mixed-Precisioncited by 387
- 2015Deep Learning with Limited Numerical Precisioncited by 368
- 2017A Survey of Model Compression and Acceleration for Deep Neural Networkscited by 298
- 2014Caffe: Convolutional Architecture for Fast Feature Embeddingcited by 287
26 more
- 2020Comparing Rewinding and Fine-tuning in Neural Network Pruningcited by 238
- 2015Quantized Convolutional Neural Networks for Mobile Devicescited by 212
- 2016Ternary Weight Networkscited by 195
- 2014Compressing Deep Convolutional Networks using Vector Quantizationcited by 189
- 2016FINN: A Framework for Fast, Scalable Binarized Neural Network Inferencecited by 141
- 2018Fast inference of deep neural networks in FPGAs for particle physicscited by 132
- 2020Benchmarking TinyML Systems: Challenges and Directioncited by 89
- 2018FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networkscited by 54
- 2020Compressing deep neural networks on FPGAs to binary and ternary precision with HLS4MLcited by 42
- 2021Fast convolutional neural networks on FPGAs with hls4mlcited by 42
- 2020Distance-Weighted Graph Neural Networks on FPGAs for Real-Time Particle Reconstruction in High Energy Physicscited by 34
- 2021Ps and Qs: Quantization-aware pruning for efficient low latency neural network inferencecited by 31
- 2019FPGA-based Accelerators of Deep Learning Networks for Learning and Classification: A Reviewcited by 29
- 2018Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directionscited by 27
- 2020Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Frameworkcited by 27
- 2020Fast inference of Boosted Decision Trees in FPGAs for particle physicscited by 26
- 2017Minimum Energy Quantized Neural Networkscited by 20
- 2018Accelerating CNN inference on FPGAs: A Surveycited by 16
- 2016Deep neural networks are robust to weight binarization and other non-linear distortionscited by 13
- 2019NeckSense: A Multi-Sensor Necklace for Detecting Eating Activities in Free-Living Conditionscited by 12
- 2019FixyNN: Efficient Hardware for Mobile Computer Vision via Transfer Learningcited by 10
- 2020FPGAs-as-a-Service Toolkit (FaaST)cited by 10
- 2016Caffeinated FPGAs: FPGA Framework For Convolutional Neural Networkscited by 8
- 2017fpgaConvNet: A Toolflow for Mapping Diverse Convolutional Neural Networks on Embedded FPGAscited by 5
- 2018Quantized Guided Pruning for Efficient Hardware Implementations of Convolutional Neural Networkscited by 5
- 2019A flexible FPGA accelerator for convolutional neural networkscited by 3
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Citing papers per year: 2021: 3; 2022: 6; 2023: 7; 2024: 15; 2025: 14; 2026: 16.
61 papers.
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- 2023PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inferencecited by 30
- 2021Performance of a Geometric Deep Learning Pipeline for HL-LHC Particle Trackingcited by 29
- 2023Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inferencecited by 29
- 2023Model Compression in Practice: Lessons Learned from Practitioners Creating On-device Machine Learning Experiencescited by 21
- 2024NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functionscited by 21
- 2024Allo: A Programming Model for Composable Accelerator Designcited by 16
- 2025TreeLUT: An Efficient Alternative to Deep Neural Networks for Inference Acceleration Using Gradient Boosted Decision Treescited by 15
- 2023TinyML: Tools, Applications, Challenges, and Future Research Directionscited by 14
- 2025NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inferencecited by 14
- 2022Graph Neural Networks in Particle Physics: Implementations, Innovations, and Challengescited by 12
- 2024PolyLUT-Add: FPGA-based LUT Inference with Wide Inputscited by 12
- 2022CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAscited by 11
38 more
- 2022Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4mlcited by 11
- 2021Nanosecond machine learning event classification with boosted decision trees in FPGA for high energy physicscited by 9
- 2022Open-source FPGA-ML codesign for the MLPerf Tiny Benchmarkcited by 9
- 2025PolyLUT: Ultra-low Latency Polynomial Inference with Hardware-Aware Structured Pruningcited by 8
- 2025da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAscited by 8
- 2023Tailor: Altering Skip Connections for Resource-Efficient Inferencecited by 6
- 2024Ultra Fast Transformers on FPGAs for Particle Physics Experimentscited by 6
- 2024Talaria: Interactively Optimizing Machine Learning Models for Efficient Inferencecited by 6
- 2025Sub-microsecond Transformers for Jet Tagging on FPGAscited by 6
- 2024ElasticAI: Creating and Deploying Energy-Efficient Deep Learning Accelerator for Pervasive Computingcited by 5
- 2025From Tiny Machine Learning to Tiny Deep Learning: A Surveycited by 5
- 2025AIE4ML: An End-to-End Framework for Compiling Neural Networks for the Next Generation of AMD AI Enginescited by 5
- 2023When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGAcited by 4
- 2024rule4ml: An Open-Source Tool for Resource Utilization and Latency Estimation for ML Models on FPGAcited by 3
- 2025AI for Scientific Discovery is a Social Problemcited by 3
- 2022FastStamp: Accelerating Neural Steganography and Digital Watermarking of Images on FPGAscited by 2
- 2023A Dataflow Compiler for Efficient LLM Inference using Custom Microscaling Formatscited by 2
- 2024AutoHLS: Learning to Accelerate Design Space Exploration for HLS Designscited by 2
- 2024HLSTransform: Energy-Efficient Llama 2 Inference on FPGAs Via High Level Synthesiscited by 2
- 2025SparseLUT: Sparse Connectivity Optimization for Lookup Table-based Deep Neural Networkscited by 2
- 2025wa-hls4ml: A Benchmark and Surrogate Models for hls4ml Resource and Latency Estimationcited by 2
- 2026Bench4HLS: End-to-End Evaluation of LLMs in High-Level Synthesis Code Generationcited by 2
- 2021A Graph Deep Learning Framework for High-Level Synthesis Design Space Explorationcited by 1
- 2024Hardware Neural Control of CartPole and F1TENTH Race Carcited by 1
- 2025HLS4PC: A Parametrizable Framework For Accelerating Point-Based 3D Point Cloud Models on FPGAcited by 1
- 2026Continuous-Flow Data-Rate-Aware CNN Inference on FPGAcited by 1
- 2026Enabling Low-Latency Machine learning on Radiation-Hard FPGAs with hls4mlcited by 1
- 2026BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Acceleratorcited by 1
- 2026HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inferencecited by 1
- 2026Spiking Neural Network inference on FPGAs with hls4mlcited by 1
- 2022Neural network accelerator for quantum controlcited by 0
- 2024SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Evictioncited by 0
- 2024Investigating Resource-efficient Neutron/Gamma Classification ML Models Targeting eFPGAscited by 0
- 2024Enhancing Dropout-based Bayesian Neural Networks with Multi-Exit on FPGAcited by 0
- 2024Hardware-Aware Neural Dropout Search for Reliable Uncertainty Prediction on FPGAcited by 0
- 2024HPCNeuroNet: A Neuromorphic Approach Merging SNN Temporal Dynamics with Transformer Attention for FPGA-based Particle Physicscited by 0
- 2025Neural Network Acceleration on MPSoC board: Integrating SLAC's SNL, Rogue Software and Auto-SNLcited by 0
- 2025Knowledge is Overrated: A zero-knowledge machine learning and cryptographic hashing-based framework for verifiable, low latency inference at the LHCcited by 0
50 most cited of 61 All 61 (JSON)
- 2026DiffLUT-Net: Differentiable Training of FPGA LUT Networks with Learnable Connectivity8 Sep 2026
- 2026Machine Learning-Based Reconstruction for Resistive Silicon Sensors13 Jul 2026
- 2026Spiking Neural Network inference on FPGAs with hls4ml8 Jun 2026
- 2026Experiments in Agentic AI for Science25 May 2026
- 2026HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference24 Apr 2026
- 2026Design Rules for Extreme-Edge Scientific Computing on AI Engines21 Apr 2026
- 2026AI-Enabled Covert Channel Detection in RF Receiver Architectures16 Apr 2026
- 2026Quantization Impact on the Accuracy and Communication Efficiency Trade-off in Federated Learning for Aerospace Predictive Maintenance9 Apr 2026
- 2026BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator26 Feb 2026
- 2026Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-precision Quantized Multiplication on Hardware Accelerators26 Feb 2026
- 2026Data-Rate-Aware High-Speed CNN Inference on FPGAs18 Feb 2026
- 2026Enabling Low-Latency Machine learning on Radiation-Hard FPGAs with hls4ml17 Feb 2026
38 more
- 2026Ultrafast On-Chip Online Learning via Spline Locality in Kolmogorov-Arnold Networks2 Feb 2026
- 2026Bench4HLS: End-to-End Evaluation of LLMs in High-Level Synthesis Code Generation16 Jan 2026
- 2026Continuous-Flow Data-Rate-Aware CNN Inference on FPGA16 Jan 2026
- 2026Enhancing LUT-based Deep Neural Networks Inference through Architecture and Connectivity Optimization14 Jan 2026
- 2025AIE4ML: An End-to-End Framework for Compiling Neural Networks for the Next Generation of AMD AI Engines17 Dec 2025
- 2025HLS4PC: A Parametrizable Framework For Accelerating Point-Based 3D Point Cloud Models on FPGA11 Dec 2025
- 2025LUNA: LUT-Based Neural Architecture for Fast and Low-Cost Qubit Readout8 Dec 2025
- 2025Knowledge is Overrated: A zero-knowledge machine learning and cryptographic hashing-based framework for verifiable, low latency inference at the LHC16 Nov 2025
- 2025wa-hls4ml: A Benchmark and Surrogate Models for hls4ml Resource and Latency Estimation6 Nov 2025
- 2025Sub-microsecond Transformers for Jet Tagging on FPGAs26 Oct 2025
- 2025AI for Scientific Discovery is a Social Problem8 Sep 2025
- 2025Neural Network Acceleration on MPSoC board: Integrating SLAC's SNL, Rogue Software and Auto-SNL29 Aug 2025
- 2025da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAs6 Jul 2025
- 2025From Tiny Machine Learning to Tiny Deep Learning: A Survey21 Jun 2025
- 2025NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inference1 Apr 2025
- 2025SparseLUT: Sparse Connectivity Optimization for Lookup Table-based Deep Neural Networks17 Mar 2025
- 2025PolyLUT: Ultra-low Latency Polynomial Inference with Hardware-Aware Structured Pruning14 Jan 2025
- 2025TreeLUT: An Efficient Alternative to Deep Neural Networks for Inference Acceleration Using Gradient Boosted Decision Trees2 Jan 2025
- 2024HPCNeuroNet: A Neuromorphic Approach Merging SNN Temporal Dynamics with Transformer Attention for FPGA-based Particle Physics23 Dec 2024
- 2024ElasticAI: Creating and Deploying Energy-Efficient Deep Learning Accelerator for Pervasive Computing29 Aug 2024
- 2024rule4ml: An Open-Source Tool for Resource Utilization and Latency Estimation for ML Models on FPGA9 Aug 2024
- 2024Hardware Neural Control of CartPole and F1TENTH Race Car11 Jul 2024
- 2024Hardware-Aware Neural Dropout Search for Reliable Uncertainty Prediction on FPGA23 Jun 2024
- 2024Enhancing Dropout-based Bayesian Neural Networks with Multi-Exit on FPGA20 Jun 2024
- 2024PolyLUT-Add: FPGA-based LUT Inference with Wide Inputs7 Jun 2024
- 2024HLSTransform: Energy-Efficient Llama 2 Inference on FPGAs Via High Level Synthesis29 Apr 2024
- 2024Investigating Resource-efficient Neutron/Gamma Classification ML Models Targeting eFPGAs19 Apr 2024
- 2024Allo: A Programming Model for Composable Accelerator Design7 Apr 2024
- 2024Talaria: Interactively Optimizing Machine Learning Models for Efficient Inference3 Apr 2024
- 2024SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Eviction27 Mar 2024
- 2024AutoHLS: Learning to Accelerate Design Space Exploration for HLS Designs15 Mar 2024
- 2024NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions29 Feb 2024
- 2024Ultra Fast Transformers on FPGAs for Particle Physics Experiments1 Feb 2024
- 2023Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inference23 Dec 2023
- 2023Model Compression in Practice: Lessons Learned from Practitioners Creating On-device Machine Learning Experiences6 Oct 2023
- 2023PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference5 Sep 2023
- 2023When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA13 Aug 2023
- 2023A Dataflow Compiler for Efficient LLM Inference using Custom Microscaling Formats28 Jul 2023
50 newest of 61 All 61 (JSON)
- 2026Experiments in Agentic AI for Sciencecited by 0
- 2026Experiments in Agentic AI for Science25 May 2026
- 2023PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inferencecited by 30
- 2021Performance of a Geometric Deep Learning Pipeline for HL-LHC Particle Trackingcited by 29
- 2023Understanding the Potential of FPGA-Based Spatial Acceleration for Large Language Model Inferencecited by 29
- 2023Model Compression in Practice: Lessons Learned from Practitioners Creating On-device Machine Learning Experiencescited by 21
- 2024NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functionscited by 21
- 2024Allo: A Programming Model for Composable Accelerator Designcited by 16
- 2023TinyML: Tools, Applications, Challenges, and Future Research Directionscited by 14
- 2025NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inferencecited by 14
- 2022Graph Neural Networks in Particle Physics: Implementations, Innovations, and Challengescited by 12
- 2024PolyLUT-Add: FPGA-based LUT Inference with Wide Inputscited by 12
- 2022CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAscited by 11
- 2022Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4mlcited by 11
12 most cited of 58 All 58 (JSON)
- 2026DiffLUT-Net: Differentiable Training of FPGA LUT Networks with Learnable Connectivity8 Sep 2026
- 2026Machine Learning-Based Reconstruction for Resistive Silicon Sensors13 Jul 2026
- 2026Spiking Neural Network inference on FPGAs with hls4ml8 Jun 2026
- 2026HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference24 Apr 2026
- 2026Design Rules for Extreme-Edge Scientific Computing on AI Engines21 Apr 2026
- 2026AI-Enabled Covert Channel Detection in RF Receiver Architectures16 Apr 2026
- 2026Quantization Impact on the Accuracy and Communication Efficiency Trade-off in Federated Learning for Aerospace Predictive Maintenance9 Apr 2026
- 2026BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator26 Feb 2026
- 2026Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-precision Quantized Multiplication on Hardware Accelerators26 Feb 2026
- 2026Data-Rate-Aware High-Speed CNN Inference on FPGAs18 Feb 2026
- 2026Enabling Low-Latency Machine learning on Radiation-Hard FPGAs with hls4ml17 Feb 2026
- 2026Ultrafast On-Chip Online Learning via Spline Locality in Kolmogorov-Arnold Networks2 Feb 2026
12 newest of 58 All 58 (JSON)