Differentiable Weightless Neural Networks
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Abstract (arXiv)
We introduce the Differentiable Weightless Neural Network (DWN), a model based on interconnected lookup tables. Training of DWNs is enabled by a novel Extended Finite Difference technique for approximate differentiation of binary values. We propose Learnable Mapping, Learnable Reduction, and Spectral Regularization to further improve the accuracy and efficiency of these models. We evaluate DWNs in three edge computing contexts: (1) an FPGA-based hardware accelerator, where they demonstrate superior latency, throughput, energy efficiency, and model area compared to state-of-the-art solutions, (2) a low-power microcontroller, where they achieve preferable accuracy to XGBoost while subject to stringent memory constraints, and (3) ultra-low-cost chips, where they consistently outperform small models in both accuracy and projected hardware area. DWNs also compare favorably against leading approaches for tabular datasets, with higher average rank. Overall, our work positions DWNs as a pioneering solution for edge-compatible high-throughput neural networks.
Key facts. Cited by 28 papers in the map (data through 14 Oct 2026). Builds on 21 of its 50 references that are in the map. First posted on arXiv 14 Oct 2024.
Builds on
21 of 50 references.
References · 21
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- 2018Speech Commands: A Dataset for Limited-Vocabulary Speech Recognitioncited by 752
- 2020AutoGluon-Tabular: Robust and Accurate AutoML for Structured Datacited by 383
- 2017Learning to Prune Deep Neural Networks via Layer-wise Optimal Brain Surgeoncited by 221
- 2021Training Neural Networks with Fixed Sparse Maskscited by 214
- 2018Scalable Methods for 8-bit Training of Neural Networkscited by 142
- 2018Fast inference of deep neural networks in FPGAs for particle physicscited by 133
- 2021MLPerf Tiny Benchmarkcited by 124
- 2019AdderNet: Do We Really Need Multiplications in Deep Learning?cited by 82
- 2022Deep Differentiable Logic Gate Networkscited by 67
9 more
- 2020LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applicationscited by 57
- 2019DeepShift: Towards Multiplication-Less Neural Networkscited by 54
- 2020Adaptive Gradient Quantization for Data-Parallel SGDcited by 45
- 2019ToyADMOS: A Dataset of Miniature-Machine Operating Sounds for Anomalous Sound Detectioncited by 44
- 2023PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inferencecited by 30
- 2024NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functionscited by 21
- 2018Joint Binary Neural Network for Multi-label Learning with Applications to Emotion Classificationcited by 12
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Citing papers per year: 2024: 2; 2025: 10; 2026: 16.
28 papers.
Sort:
- 2024Convolutional Differentiable Logic Gate Networkscited by 37
- 2025NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inferencecited by 14
- 2025Light Differentiable Logic Gate Networkscited by 9
- 2025WARP-LUTs -- Walsh-Assisted Relaxation for Probabilistic Look Up Tablescited by 6
- 2025LILogic Net: Compact Logic Gate Networks with Learnable Connectivity for Efficient Hardware Deploymentcited by 6
- 2025Scalable Interconnect Learning in Boolean Networkscited by 4
- 2025LL-ViT: Edge Deployable Vision Transformers with Look Up Table Neuronscited by 3
- 2026WARP Logic Neural Networkscited by 2
- 2025AI Compute Architecture and Evolution Trendscited by 1
- 2025Differentiable Weightless Controllers: Learning Logic Circuits for Continuous Controlcited by 1
- 2026Inter-patient ECG Arrhythmia Classification with LGNs and LUTNscited by 1
- 2026Continuous-Flow Data-Rate-Aware CNN Inference on FPGAcited by 1
16 more
- 2026Learning Compact Boolean Networkscited by 1
- 2026BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networkscited by 1
- 2026HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inferencecited by 1
- 2026FPGN: Redefining Ultra-Fast Programmable Gate-based Neural Acceleration with Differentiable LUTscited by 1
- 2024Shrinking the Giant : Quasi-Weightless Transformers for Low Energy Inferencecited by 0
- 2025Quantization Effects of Artificial Neural Networks for Embedded Edge-Computing Applicationscited by 0
- 2025BEP: A Binary Error Propagation Algorithm for Binary Neural Networks Trainingcited by 0
- 2026Enhancing LUT-based Deep Neural Networks Inference through Architecture and Connectivity Optimizationcited by 0
- 2026TT-Sparse: Learning Sparse Rule Models with Differentiable Truth Tablescited by 0
- 2026GLANCE: Gaze-Led Attention Network for Compressed Edge-inferencecited by 0
- 2026From Arithmetic to Logic: The Resilience of Logic and Lookup-Based Neural Networks Under Parameter Bit-Flipscited by 0
- 2026Fitting Multilinear Polynomials for Logic Gate Networkscited by 0
- 2026CascadeLUT: Information-Ordered Streaming Inference for Bandwidth-Constrained FPGAscited by 0
- 2026DiffLUT-Net: Differentiable Training of FPGA LUT Networks with Learnable Connectivitycited by 0
- 2026Task-Aware Discretization of Differentiable Logic Gate Networkscited by 0
- 2026Overcoming Kernel Redundancy for Scaling Logic Gate Networkscited by 0
- 2026Overcoming Kernel Redundancy for Scaling Logic Gate Networks1 Oct 2026
- 2026Task-Aware Discretization of Differentiable Logic Gate Networks27 Sep 2026
- 2026DiffLUT-Net: Differentiable Training of FPGA LUT Networks with Learnable Connectivity8 Sep 2026
- 2026CascadeLUT: Information-Ordered Streaming Inference for Bandwidth-Constrained FPGAs1 Aug 2026
- 2026FPGN: Redefining Ultra-Fast Programmable Gate-based Neural Acceleration with Differentiable LUTs9 Jul 2026
- 2026Fitting Multilinear Polynomials for Logic Gate Networks9 May 2026
- 2026HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference24 Apr 2026
- 2026From Arithmetic to Logic: The Resilience of Logic and Lookup-Based Neural Networks Under Parameter Bit-Flips24 Mar 2026
- 2026GLANCE: Gaze-Led Attention Network for Compressed Edge-inference16 Mar 2026
- 2026TT-Sparse: Learning Sparse Rule Models with Differentiable Truth Tables8 Mar 2026
- 2026BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networks7 Feb 2026
- 2026Learning Compact Boolean Networks5 Feb 2026
16 more
- 2026WARP Logic Neural Networks3 Feb 2026
- 2026Continuous-Flow Data-Rate-Aware CNN Inference on FPGA16 Jan 2026
- 2026Inter-patient ECG Arrhythmia Classification with LGNs and LUTNs16 Jan 2026
- 2026Enhancing LUT-based Deep Neural Networks Inference through Architecture and Connectivity Optimization14 Jan 2026
- 2025BEP: A Binary Error Propagation Algorithm for Binary Neural Networks Training3 Dec 2025
- 2025Differentiable Weightless Controllers: Learning Logic Circuits for Continuous Control1 Dec 2025
- 2025LILogic Net: Compact Logic Gate Networks with Learnable Connectivity for Efficient Hardware Deployment15 Nov 2025
- 2025Quantization Effects of Artificial Neural Networks for Embedded Edge-Computing Applications7 Nov 2025
- 2025LL-ViT: Edge Deployable Vision Transformers with Look Up Table Neurons2 Nov 2025
- 2025WARP-LUTs -- Walsh-Assisted Relaxation for Probabilistic Look Up Tables17 Oct 2025
- 2025Light Differentiable Logic Gate Networks26 Sep 2025
- 2025AI Compute Architecture and Evolution Trends29 Aug 2025
- 2025Scalable Interconnect Learning in Boolean Networks3 Jul 2025
- 2025NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inference1 Apr 2025
- 2024Convolutional Differentiable Logic Gate Networks7 Nov 2024
- 2024Shrinking the Giant : Quasi-Weightless Transformers for Low Energy Inference4 Nov 2024
- 2024Convolutional Differentiable Logic Gate Networkscited by 37
- 2025NeuraLUT-Assemble: Hardware-aware Assembling of Sub-Neural Networks for Efficient LUT Inferencecited by 14
- 2025Light Differentiable Logic Gate Networkscited by 9
- 2025WARP-LUTs -- Walsh-Assisted Relaxation for Probabilistic Look Up Tablescited by 6
- 2025LILogic Net: Compact Logic Gate Networks with Learnable Connectivity for Efficient Hardware Deploymentcited by 6
- 2025Scalable Interconnect Learning in Boolean Networkscited by 4
- 2025LL-ViT: Edge Deployable Vision Transformers with Look Up Table Neuronscited by 3
- 2026WARP Logic Neural Networkscited by 2
- 2025AI Compute Architecture and Evolution Trendscited by 1
- 2025Differentiable Weightless Controllers: Learning Logic Circuits for Continuous Controlcited by 1
- 2026Inter-patient ECG Arrhythmia Classification with LGNs and LUTNscited by 1
- 2026Continuous-Flow Data-Rate-Aware CNN Inference on FPGAcited by 1
12 most cited of 28 All 28 (JSON)
- 2026Overcoming Kernel Redundancy for Scaling Logic Gate Networks1 Oct 2026
- 2026Task-Aware Discretization of Differentiable Logic Gate Networks27 Sep 2026
- 2026DiffLUT-Net: Differentiable Training of FPGA LUT Networks with Learnable Connectivity8 Sep 2026
- 2026CascadeLUT: Information-Ordered Streaming Inference for Bandwidth-Constrained FPGAs1 Aug 2026
- 2026FPGN: Redefining Ultra-Fast Programmable Gate-based Neural Acceleration with Differentiable LUTs9 Jul 2026
- 2026Fitting Multilinear Polynomials for Logic Gate Networks9 May 2026
- 2026HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference24 Apr 2026
- 2026From Arithmetic to Logic: The Resilience of Logic and Lookup-Based Neural Networks Under Parameter Bit-Flips24 Mar 2026
- 2026GLANCE: Gaze-Led Attention Network for Compressed Edge-inference16 Mar 2026
- 2026TT-Sparse: Learning Sparse Rule Models with Differentiable Truth Tables8 Mar 2026
- 2026BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networks7 Feb 2026
- 2026Learning Compact Boolean Networks5 Feb 2026
12 newest of 28 All 28 (JSON)