mlsanityData to 7 Oct 2026

Veri-Sure: A Contract-Aware Multi-Agent Framework with Temporal Tracing and Formal Verification for Correct RTL Code Generation

arXiv 2601.19747 ↗First posted 27 Jan 2026cs.AR cs.AI cs.SEcited by 3

On the map: LLM agents and tool use → Software engineering coding agents

Abstract (arXiv)

In the rapidly evolving field of Electronic Design Automation (EDA), the deployment of Large Language Models (LLMs) for Register-Transfer Level (RTL) design has emerged as a promising direction. However, silicon-grade correctness remains bottlenecked by: (i) limited test coverage and reliability of simulation-centric evaluation, (ii) regressions and repair hallucinations introduced by iterative debugging, and (iii) semantic drift as intent is reinterpreted across agent handoffs. In this work, we propose Veri-Sure, a multi-agent framework that establishes a design contract to align agents' intent and uses a patching mechanism guided by static dependency slicing to perform precise, localized repairs. By integrating a multi-branch verification pipeline that combines trace-driven temporal analysis with formal verification consisting of assertion-based checking and boolean equivalence proofs, Veri-Sure enables functional correctness beyond pure simulations. We also introduce VerilogEval-v2-EXT, extending the original benchmark with 53 more industrial-grade design tasks and stratified difficulty levels, and show that Veri-Sure achieves state-of-the-art verified-correct RTL code generation performance, surpassing standalone LLMs and prior agentic systems.

Key facts. Cited by 3 papers in the map (data through 7 Oct 2026). Placed in Software engineering coding agents, one of 16 directions in LLM agents and tool use. Builds on 20 of its 32 references that are in the map. First posted on arXiv 27 Jan 2026.

Builds on

20 of 32 references.

Closest ancestors · 3

Same direction, newest first

  1. 2024MAGE: A Multi-Agent Engine for Automated RTL Code Generation10 Dec
  2. 2024VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool15 Aug
  3. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDA20 Aug

Other references · 17

  1. 2024DeepSeek-Coder: When the Large Language Model Meets Programming -- The Rise of Code Intelligencecited by 1,154
  2. 2024A Survey on Large Language Models for Code Generationcited by 646
  3. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 197
  4. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 168
  5. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 143
  6. 2024OpenCoder: The Open Cookbook for Top-Tier Code Large Language Modelscited by 127
  7. 2024BetterV: Controlled Verilog Generation with Discriminative Guidancecited by 99
  8. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 98
  9. 2023AutoChip: Automating HDL Generation Using LLM Feedbackcited by 80
  10. 2024Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generationcited by 45
  11. 2024AutoVCoder: A Systematic Framework for Automated Verilog Code Generation using LLMscited by 36
  12. 2025QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generationcited by 34
5 more
  1. 2024AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMscited by 30
  2. 2025DeepRTL: Bridging Verilog Understanding and Generation with a Unified Representation Modelcited by 23
  3. 2024Large Language Model for Verilog Generation with Code-Structure-Guided Reinforcement Learningcited by 15
  4. 2025QiMeng-SALV: Signal-Aware Learning for Verilog Code Generationcited by 4
  5. 2025REvolution: An Evolutionary Framework for RTL Generation driven by Large Language Modelscited by 4

Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2026: 3.

3 papers.

  1. 2026COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generationcited by 3
  2. 2026AutoSurrogate: An LLM-Driven Multi-Agent Framework for Autonomous Construction of Deep Learning Surrogate Models in Subsurface Flowcited by 0
  3. 2026SkillForge: Compositional Skill Synthesis with Verification-in-the-Loop for Generating Formally Verified Dafny Programscited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2025Automated Multi-Agent Workflows for RTL Design
  2. 2026VeriAgent: A Tool-Integrated Multi-Agent System with Evolving Memory for PPA-Aware RTL Code Generation
  3. 2026Open-Source LLM-Driven Formal Verification: A Multi-Agent Pipeline for RTL Repair
  4. 2026VeriGraphi: A Multi-Agent Framework of Hierarchical RTL Generation for Large Hardware Designs
  5. 2026CODMAS: A Dialectic Multi-Agent Collaborative Framework for Structured RTL Optimization
  6. 2024EDA-Aware RTL Generation with Large Language Models
  7. 2026GoGoTB: Agentic RTL Verification with Specification-Grounded Coverage Closure
  8. 2025Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification