mlsanityData to 14 Oct 2026

ScaleRTL: Scaling LLMs with Reasoning Data and Test-Time Compute for Accurate RTL Code Generation

arXiv 2506.05566 ↗First posted 5 Jun 2025cs.AR cs.AIcited by 22

On the map: LLM reasoning → Reasoning for agents, planning and code

Abstract (arXiv)

Recent advances in large language models (LLMs) have enabled near-human performance on software coding benchmarks, but their effectiveness in RTL code generation remains limited due to the scarcity of high-quality training data. While prior efforts have fine-tuned LLMs for RTL tasks, they do not fundamentally overcome the data bottleneck and lack support for test-time scaling due to their non-reasoning nature. In this work, we introduce ScaleRTL, the first reasoning LLM for RTL coding that scales up both high-quality reasoning data and test-time compute. Specifically, we curate a diverse set of long chain-of-thought reasoning traces averaging 56K tokens each, resulting in a dataset of 3.5B tokens that captures rich RTL knowledge. Fine-tuning a general-purpose reasoning model on this corpus yields ScaleRTL that is capable of deep RTL reasoning. Subsequently, we further enhance the performance of ScaleRTL through a novel test-time scaling strategy that extends the reasoning process via iteratively reflecting on and self-correcting previous reasoning steps. Experimental results show that ScaleRTL achieves state-of-the-art performance on VerilogEval and RTLLM, outperforming 18 competitive baselines by up to 18.4% on VerilogEval and 12.7% on RTLLM.

Key facts. Cited by 22 papers in the map (data through 14 Oct 2026). Placed in Reasoning for agents, planning and code, one of 17 directions in LLM reasoning. Builds on 30 of its 32 references that are in the map. First posted on arXiv 5 Jun 2025.

Builds on

30 of 32 references.

Closest ancestors · 2

Same direction, newest first

  1. 2025S*: Test Time Scaling for Code Generation20 Feb
  2. 2024Qwen2.5-Coder Technical Report18 Sep

Other references · 28

  1. 2023GPT-4 Technical Reportcited by 18,396
  2. 2024The Llama 3 Herd of Modelscited by 14,715
  3. 2022Chain-of-Thought Prompting Elicits Reasoning in Large Language Modelscited by 12,459
  4. 2021Evaluating Large Language Models Trained on Codecited by 8,320
  5. 2020Scaling Laws for Neural Language Modelscited by 6,586
  6. 2025DeepSeek-R1: Incentivizing Reasoning Capability in LLMs via Reinforcement Learningcited by 6,330
  7. 2023Efficient Memory Management for Large Language Model Serving with PagedAttentioncited by 5,944
  8. 2024GPT-4o System Cardcited by 4,588
  9. 2022Large Language Models are Zero-Shot Reasonerscited by 4,374
  10. 2021Program Synthesis with Large Language Modelscited by 3,637
  11. 2023Self-Refine: Iterative Refinement with Self-Feedbackcited by 3,442
  12. 2022Training Compute-Optimal Large Language Modelscited by 3,019
16 more
  1. 2023Code Llama: Open Foundation Models for Codecited by 2,139
  2. 2024Scaling LLM Test-Time Compute Optimally can be More Effective than Scaling Model Parameterscited by 1,986
  3. 2025s1: Simple test-time scalingcited by 1,341
  4. 2023REPLUG: Retrieval-Augmented Black-Box Language Modelscited by 792
  5. 2024StarCoder 2 and The Stack v2: The Next Generationcited by 502
  6. 2024DeepSeek-Coder-V2: Breaking the Barrier of Closed-Source Models in Code Intelligencecited by 331
  7. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  8. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 148
  9. 2024Nemotron-4 340B Technical Reportcited by 144
  10. 2025Competitive Programming with Large Reasoning Modelscited by 119
  11. 2024BetterV: Controlled Verilog Generation with Discriminative Guidancecited by 100
  12. 2024VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Toolcited by 85
  13. 2024OriGen:Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflectioncited by 56
  14. 2024MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generationcited by 46
  15. 2024CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repaircited by 42
  16. 2024CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarizationcited by 38

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 5; 2026: 17.

22 papers.

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  1. 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 15
  2. 2025VeriMoA: A Mixture-of-Agents Framework for Spec-to-HDL Generationcited by 15
  3. 2026ACE-RTL: When Agentic Context Evolution Meets RTL-Specialized LLMscited by 12
  4. 2025Large Language Model for Verilog Code Generation: Literature Review and the Road Aheadcited by 8
  5. 2026EvolVE: Evolutionary Search for LLM-based Verilog Generation and Optimizationcited by 7
  6. 2026Agentic Hardware Design as Repository-Level Code Evolutioncited by 6
  7. 2025REvolution: An Evolutionary Framework for RTL Generation driven by Large Language Modelscited by 4
  8. 2026GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generationcited by 4
  9. 2026CktEvo: Repository-Level RTL Code Benchmark for Design Evolutioncited by 3
  10. 2026COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generationcited by 3
  11. 2026Trace2Skill: Verifier-Guided Skill Evolution for Long-Context EDA Agentscited by 3
  12. 2026Structured Testbench Generation for LLM-Driven HDL Design and Verification-Oriented Data Curationcited by 2
10 more
  1. 2025Multimodal Chip Physical Design Engineer Assistantcited by 1
  2. 2026FluxLite: Inference-Time Proposal Control for Discrete Diffusion Modelscited by 1
  3. 2026ChipCraftBrain: Validation-First RTL Generation via Multi-Agent Orchestrationcited by 0
  4. 2026CASS-RTL: Correctness-Aware Subspace Steering for RTL Generation with LLMscited by 0
  5. 2026EstRTL: Functional Estimation Guided RTL Code Generationcited by 0
  6. 2026AUTOGATE: Automated Clock Gating via Toggling-Aware LLM-based RTL Rewritingcited by 0
  7. 2026How LLMs Fail and Generalize in RTL Coding for Hardware Design?cited by 0
  8. 2026Leveraging Instruction Tuning and Merging for Reasoning Model Adaptationcited by 0
  9. 2026SCALE: Self-Supervised Constraint-Aware Layout GEneration for Local P&R DRV Fixing at Advanced Nodescited by 0
  10. 2026VeriTrace: Human-Like Temporal Exploration Completes Agentic Action Spacecited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2025Increasing LLM Coding Capabilities through Diverse Synthetic Coding Tasks
  2. 2026ThinkBooster: A Unified Framework for Seamless Test-Time Scaling of LLM Reasoning
  3. 2025Z1: Efficient Test-time Scaling with Code
  4. 2026LLM4RTL: Tool-Assisted LLM for RTL Generation
  5. 2025rStar-Coder: Scaling Competitive Code Reasoning with a Large-Scale Verified Dataset
  6. 2026RTL-BenchLS: A Large-Scale Benchmark for RTL Reasoning and Generation with Large Language Models
  7. 2025Prompting Test-Time Scaling Is A Strong LLM Reasoning Data Augmentation
  8. 2026Think Deep, Not Just Long: Measuring LLM Reasoning Effort via Deep-Thinking Tokens