mlsanityData to 7 Oct 2026

Multimodal Chip Physical Design Engineer Assistant

arXiv 2510.15872 ↗First posted 2 Jul 2025cs.AR cs.AI cs.LGcited by 1

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Abstract (arXiv)

Modern chip physical design relies heavily on Electronic Design Automation (EDA) tools, which often struggle to provide interpretable feedback or actionable guidance for improving routing congestion. In this work, we introduce a Multimodal Large Language Model Assistant (MLLMA) that bridges this gap by not only predicting congestion but also delivering human-interpretable design suggestions. Our method combines automated feature generation through MLLM-guided genetic prompting with an interpretable preference learning framework that models congestion-relevant tradeoffs across visual, tabular, and textual inputs. We compile these insights into a "Design Suggestion Deck" that surfaces the most influential layout features and proposes targeted optimizations. Experiments on the CircuitNet benchmark demonstrate that our approach outperforms existing models on both accuracy and explainability. Additionally, our design suggestion guidance case study and qualitative analyses confirm that the learned preferences align with real-world design principles and are actionable for engineers. This work highlights the potential of MLLMs as interactive assistants for interpretable and context-aware physical design optimization.

Key facts. Cited by 1 paper in the map (data through 7 Oct 2026). Builds on 29 of its 34 references that are in the map. First posted on arXiv 2 Jul 2025.

Builds on

29 of 34 references.

References · 29

  1. 2024MiniCPM-V: A GPT-4V Level MLLM on Your Phonecited by 1,061
  2. 2023MM-REACT: Prompting ChatGPT for Multimodal Reasoning and Actioncited by 511
  3. 2024Interpretable Preferences via Multi-Objective Reward Modeling and Mixture-of-Expertscited by 369
  4. 2023MultiModal-GPT: A Vision and Language Model for Dialogue with Humanscited by 255
  5. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 168
  6. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 136
  7. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 98
  8. 2024CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repaircited by 41
  9. 2025Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verificationcited by 41
  10. 2023Towards Optimizing with Large Language Modelscited by 34
  11. 2024Mipha: A Comprehensive Overhaul of Multimodal Assistant with Small Language Modelscited by 24
  12. 2025ScaleRTL: Scaling LLMs with Reasoning Data and Test-Time Compute for Accurate RTL Code Generationcited by 22
17 more
  1. 2024Code Less, Align More: Efficient LLM Fine-tuning for Code Generation with Data Pruningcited by 19
  2. 2024Genetic Instruct: Scaling up Synthetic Generation of Coding Instructions for Large Language Modelscited by 17
  3. 2024Text-centric Alignment for Multi-Modality Learningcited by 12
  4. 2022Toward More Generalized Malicious URL Detection Modelscited by 9
  5. 2023Differential Good Arm Identificationcited by 8
  6. 2022Fast online inference for nonlinear contextual bandit based on Generative Adversarial Networkcited by 7
  7. 2023AutoML-GPT: Large Language Model for AutoMLcited by 6
  8. 2024lil'HDoC: An Algorithm for Good Arm Identification under Small Threshold Gapcited by 5
  9. 2024Enhance Modality Robustness in Text-Centric Multimodal Alignment with Adversarial Promptingcited by 5
  10. 2024Enhance the Robustness of Text-Centric Multimodal Alignmentscited by 4
  11. 2025Uncertainty Profiles for LLMs: Uncertainty Source Decomposition and Adaptive Model-Metric Selectioncited by 4
  12. 2023Circuit as Set of Pointscited by 3
  13. 2023PSGText: Stroke-Guided Scene Text Editing with PSP Modulecited by 2
  14. 2024LinearAPT: An Adaptive Algorithm for the Fixed-Budget Thresholding Linear Bandit Problemcited by 2
  15. 2024Benchmarking Large Language Model Uncertainty for Prompt Optimizationcited by 2
  16. 2024Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descentcited by 1
  17. 2025Generalizing Large Language Model Usability Across Resource-Constrainedcited by 1

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Cited by year (2026 to 7 Oct)

Citing papers per year: 2026: 1.

1 paper.

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  1. 2025ORFS-agent: Tool-Using Agents for Chip Design Optimization
  2. 2025CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs
  3. 2026CircuitLM: A Multi-Agent LLM-Aided Design Framework for Generating Circuit Schematics from Natural Language Prompts
  4. 2024ChipExpert: The Open-Source Integrated-Circuit-Design-Specific Large Language Model
  5. 2025CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design
  6. 2025AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation
  7. 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizing
  8. 2025HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimization