mlsanityData to 7 Oct 2026

ACE-RTL: When Agentic Context Evolution Meets RTL-Specialized LLMs

arXiv 2602.10218 ↗First posted 10 Feb 2026cs.AR cs.LGcited by 12

On the map: LLM agents and tool use → Software engineering coding agents

Abstract (arXiv)

Recent advances in LLMs have sparked growing interest in applying them to hardware design automation, particularly for accurate RTL code generation. Prior efforts follow two largely independent paths: (i) training domain-adapted RTL models to internalize hardware semantics, (ii) developing agentic systems that leverage frontier generic LLMs guided by simulation feedback. However, these two paths exhibit complementary strengths and weaknesses. In this work, we present ACE-RTL that unifies both directions through Agentic Context Evolution (ACE). ACE-RTL integrates an RTL-specialized LLM, trained on a large-scale dataset of 1.7 million RTL samples, with a frontier reasoning LLM through three synergistic components: the generator, reflector, and coordinator. These components iteratively refine RTL code toward functional correctness. We further analyze a parallel scaling strategy that reduces wall-clock iterations to first success by exploring diverse debugging trajectories concurrently. On the CVDP benchmark, ACE-RTL achieves up to a 41.02% pass rate improvement over 14 competitive baselines.

Key facts. Cited by 12 papers in the map (data through 7 Oct 2026). Placed in Software engineering coding agents, one of 16 directions in LLM agents and tool use. Builds on 19 of its 34 references that are in the map. First posted on arXiv 10 Feb 2026.

Builds on

19 of 34 references.

Closest ancestors · 3

Same direction, newest first

  1. 2025Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification17 Jun
  2. 2024MAGE: A Multi-Agent Engine for Automated RTL Code Generation10 Dec
  3. 2024VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool15 Aug

Other references · 16

  1. 2020Scaling Laws for Neural Language Modelscited by 6,411
  2. 2023Efficient Memory Management for Large Language Model Serving with PagedAttentioncited by 5,767
  3. 2024GPT-4o System Cardcited by 4,467
  4. 2023SWE-bench: Can Language Models Resolve Real-World GitHub Issues?cited by 3,193
  5. 2022Scaling Instruction-Finetuned Language Modelscited by 2,997
  6. 2022Training Compute-Optimal Large Language Modelscited by 2,927
  7. 2024A Survey on LLM-as-a-Judgecited by 1,384
  8. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 246
  9. 2023Rethinking Benchmark and Contamination for Language Models with Rephrased Samplescited by 192
  10. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 168
  11. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 143
  12. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 69
4 more
  1. 2024CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repaircited by 41
  2. 2024RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projectscited by 25
  3. 2025ScaleRTL: Scaling LLMs with Reasoning Data and Test-Time Compute for Accurate RTL Code Generationcited by 22
  4. 2024ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolationcited by 6

Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2026: 12.

12 papers.

  1. 2026Nemotron 3 Ultra: Open, Efficient Mixture-of-Experts Hybrid Mamba-Transformer Model for Agentic Reasoningcited by 32
  2. 2026Agentic Hardware Design as Repository-Level Code Evolutioncited by 6
  3. 2026Dr. RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvementcited by 5
  4. 2026COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generationcited by 3
  5. 2026Trace2Skill: Verifier-Guided Skill Evolution for Long-Context EDA Agentscited by 3
  6. 2026Exploring the Agentic Frontier of Verilog Code Generationcited by 1
  7. 2026ChipCraftBrain: Validation-First RTL Generation via Multi-Agent Orchestrationcited by 0
  8. 2026AUTOGATE: Automated Clock Gating via Toggling-Aware LLM-based RTL Rewritingcited by 0
  9. 2026VeriTrace: Human-Like Temporal Exploration Completes Agentic Action Spacecited by 0
  10. 2026LLMs in Digital EDA: A perspective on shifting roles from Generation to Orchestrationcited by 0
  11. 2026iCoder-27B: Recursive AI-Led Development of Frontier Industrial Coding Modelcited by 0
  12. 2026BEHAVE: Functional Behavior Modeling Enables Self-Improving Agents for Hardware Design and Verificationcited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2026RTL-BenchLS: A Large-Scale Benchmark for RTL Reasoning and Generation with Large Language Models
  2. 2025TuRTLe: A Unified Evaluation of LLMs for RTL Generation
  3. 2026CODMAS: A Dialectic Multi-Agent Collaborative Framework for Structured RTL Optimization
  4. 2026SeqFeed: Improving Agentic RTL Code Generation with Sequential Behavior Feedback
  5. 2025DUET: Agentic Design Understanding via Experimentation and Testing
  6. 2025PEFA-AI: Advancing Open-source LLMs for RTL generation using Progressive Error Feedback Agentic-AI
  7. 2026How LLMs Fail and Generalize in RTL Coding for Hardware Design?
  8. 2026VeriGraphi: A Multi-Agent Framework of Hierarchical RTL Generation for Large Hardware Designs