mlsanityData to 14 Oct 2026

SPICEPilot: Navigating SPICE Code Generation and Simulation with AI Guidance

arXiv 2410.20553 ↗First posted 27 Oct 2024cs.AR cs.AIcited by 10

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Abstract (arXiv)

Large Language Models (LLMs) have shown great potential in automating code generation; however, their ability to generate accurate circuit-level SPICE code remains limited due to a lack of hardware-specific knowledge. In this paper, we analyze and identify the typical limitations of existing LLMs in SPICE code generation. To address these limitations, we present SPICEPilot a novel Python-based dataset generated using PySpice, along with its accompanying framework. This marks a significant step forward in automating SPICE code generation across various circuit configurations. Our framework automates the creation of SPICE simulation scripts, introduces standardized benchmarking metrics to evaluate LLM's ability for circuit generation, and outlines a roadmap for integrating LLMs into the hardware design process. SPICEPilot is open-sourced under the permissive MIT license at https://github.com/ACADLab/SPICEPilot.git.

Key facts. Cited by 10 papers in the map (data through 14 Oct 2026). Builds on 25 of its 29 references that are in the map. First posted on arXiv 27 Oct 2024.

Builds on

25 of 29 references.

References · 25

  1. 2020Language Models are Few-Shot Learnerscited by 32,419
  2. 2023Llama 2: Open Foundation and Fine-Tuned Chat Modelscited by 13,028
  3. 2021Evaluating Large Language Models Trained on Codecited by 8,320
  4. 2023Code Llama: Open Foundation Models for Codecited by 2,139
  5. 2023Is Your Code Generated by ChatGPT Really Correct? Rigorous Evaluation of Large Language Models for Code Generationcited by 1,391
  6. 2023StarCoder: may the source be with you!cited by 799
  7. 2023WizardCoder: Empowering Code Large Language Models with Evol-Instructcited by 733
  8. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  9. 2022Why Can GPT Learn In-Context? Language Models Implicitly Perform Gradient Descent as Meta-Optimizerscited by 204
  10. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 200
  11. 2019SPoC: Search-based Pseudocode to Codecited by 176
  12. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 148
13 more
  1. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 140
  2. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 122
  3. 2023ChipGPT: How far are we from natural language hardware designcited by 105
  4. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 84
  5. 2023AutoChip: Automating HDL Generation Using LLM Feedbackcited by 83
  6. 2023GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Modelscited by 61
  7. 2024MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generationcited by 46
  8. 2024AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMscited by 31
  9. 2024AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Portingcited by 29
  10. 2024LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Designcited by 25
  11. 2024VerilogReader: LLM-Aided Hardware Test Generationcited by 17
  12. 2024A Multi-Expert Large Language Model Architecture for Verilog Code Generationcited by 15
  13. 2024SA-DS: A Dataset for Large Language Model-Driven AI Accelerator Design Generationcited by 9

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 6; 2026: 4.

10 papers.

  1. 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 15
  2. 2025PICBench: Benchmarking LLMs for Photonic Integrated Circuits Designcited by 5
  3. 2026AnalogAgent: Self-Improving Analog Circuit Design Automation with LLM Agentscited by 4
  4. 2025DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretrainingcited by 2
  5. 2025TPU-Gen: LLM-Driven Custom Tensor Processing Unit Generatorcited by 2
  6. 2025Evaluating LLM-based Workflows for Switched-Mode Power Supply Designcited by 2
  7. 2025Dataset Construction for Training LLM to Learn Analog Circuit Knowledgecited by 1
  8. 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulationcited by 1
  9. 2026PICasso: An AI-Enabled Design Framework for Autonomous Optimization of Silicon Photonic Devicescited by 0
  10. 2026Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Taskscited by 0