mlsanityData to 7 Oct 2026

Evaluating LLM-based Workflows for Switched-Mode Power Supply Design

arXiv 2507.10639 ↗First posted 14 Jul 2025cs.AR cs.AIcited by 2

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Abstract (arXiv)

Large language models (LLMs) have great potential to enhance productivity in many disciplines, such as software engineering. However, it is unclear to what extent they can assist in the design process of electronic circuits. This paper focuses on the application of LLMs to switched-mode power supply (SMPS) design for printed circuit boards (PCBs). We present multiple LLM-based workflows that combine reasoning, retrieval-augmented generation (RAG), and a custom toolkit that enables the LLM to interact with SPICE simulations to estimate the impact of circuit modifications. Two benchmark experiments are presented to analyze the performance of LLM-based assistants for different design tasks, including parameter tuning, topology adaption and optimization of SMPS circuits. Experiment results show that SPICE simulation feedback and current LLM advancements, such as reasoning, significantly increase the solve rate on 269 manually created benchmark tasks from 15% to 91%. Furthermore, our analysis reveals that most parameter tuning design tasks can be solved, while limits remain for certain topology adaption tasks. Our experiments offer insights for improving current concepts, for example by adapting text-based circuit representations

Key facts. Cited by 2 papers in the map (data through 7 Oct 2026). Builds on 19 of its 30 references that are in the map. First posted on arXiv 14 Jul 2025.

Builds on

19 of 30 references.

References · 19

  1. 2022Chain-of-Thought Prompting Elicits Reasoning in Large Language Modelscited by 12,302
  2. 2020Retrieval-Augmented Generation for Knowledge-Intensive NLP Taskscited by 9,160
  3. 2022Self-Consistency Improves Chain of Thought Reasoning in Language Modelscited by 5,601
  4. 2023Tree of Thoughts: Deliberate Problem Solving with Large Language Modelscited by 3,155
  5. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 246
  6. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 197
  7. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 143
  8. 2023ChipGPT: How far are we from natural language hardware designcited by 101
  9. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 98
  10. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 82
  11. 2023AutoChip: Automating HDL Generation Using LLM Feedbackcited by 80
  12. 2023GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Modelscited by 59
7 more
  1. 2020Gryffin: An algorithm for Bayesian optimization of categorical variables informed by expert knowledgecited by 30
  2. 2024AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Portingcited by 29
  3. 2024LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuitscited by 22
  4. 2024Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AIcited by 17
  5. 2024AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAGcited by 16
  6. 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuitscited by 14
  7. 2024SPICEPilot: Navigating SPICE Code Generation and Simulation with AI Guidancecited by 10

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Cited by year (2026 to 7 Oct)

Citing papers per year: 2025: 1; 2026: 1.

2 papers.

  1. 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 14
  2. 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulationcited by 1

Similar, not cited

Close in wording, no citation either way

  1. 2026AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models
  2. 2025CIRCUIT: A Benchmark for Circuit Interpretation and Reasoning Capabilities of LLMs
  3. 2025White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Design
  4. 2024AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models
  5. 2025TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuits
  6. 2025Rethinking LLM-Based RTL Code Optimization Via Timing Logic Metamorphosis
  7. 2024MetRex: A Benchmark for Verilog Code Metric Reasoning Using LLMs
  8. 2026Interpretable and Verifiable Hardware Generation with LLM-Driven Stepwise Refinement