mlsanityData to 7 Oct 2026

AIvril: AI-Driven RTL Generation With Verification In-The-Loop

arXiv 2409.11411 ↗First posted 3 Sep 2024cs.AI cs.AR cs.CLcited by 15

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Abstract (arXiv)

Large Language Models (LLMs) are computational models capable of performing complex natural language processing tasks. Leveraging these capabilities, LLMs hold the potential to transform the entire hardware design stack, with predictions suggesting that front-end and back-end tasks could be fully automated in the near future. Currently, LLMs show great promise in streamlining Register Transfer Level (RTL) generation, enhancing efficiency, and accelerating innovation. However, their probabilistic nature makes them prone to inaccuracies - a significant drawback in RTL design, where reliability and precision are essential. To address these challenges, this paper introduces AIvril, an advanced framework designed to enhance the accuracy and reliability of RTL-aware LLMs. AIvril employs a multi-agent, LLM-agnostic system for automatic syntax correction and functional verification, significantly reducing - and in many cases, completely eliminating - instances of erroneous code generation. Experimental results conducted on the VerilogEval-Human dataset show that our framework improves code quality by nearly 2x when compared to previous works, while achieving an 88.46% success rate in meeting verification objectives. This represents a critical step toward automating and optimizing hardware design workflows, offering a more dependable methodology for AI-driven RTL design.

Key facts. Cited by 15 papers in the map (data through 7 Oct 2026). Builds on 16 of its 19 references that are in the map. First posted on arXiv 3 Sep 2024.

Builds on

16 of 19 references.

References · 16

  1. 2024The Llama 3 Herd of Modelscited by 14,192
  2. 2022Chain-of-Thought Prompting Elicits Reasoning in Large Language Modelscited by 12,302
  3. 2020Retrieval-Augmented Generation for Knowledge-Intensive NLP Taskscited by 9,160
  4. 2022ReAct: Synergizing Reasoning and Acting in Language Modelscited by 8,355
  5. 2021Evaluating Large Language Models Trained on Codecited by 8,053
  6. 2023A Survey of Large Language Modelscited by 2,537
  7. 2022Language Models as Zero-Shot Planners: Extracting Actionable Knowledge for Embodied Agentscited by 1,029
  8. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 246
  9. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 197
  10. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 168
  11. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 136
  12. 2023ChipGPT: How far are we from natural language hardware designcited by 101
4 more
  1. 2023RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Modelscited by 98
  2. 2024VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Toolcited by 85
  3. 2024CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarizationcited by 38
  4. 2024Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation frameworkcited by 36

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Cited by year (2026 to 7 Oct)

Citing papers per year: 2024: 2; 2025: 9; 2026: 4.

15 papers.

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  1. 2024MAGE: A Multi-Agent Engine for Automated RTL Code Generationcited by 31
  2. 2025RealBench: Benchmarking Verilog Generation Models with Real-World IP Designscited by 14
  3. 2025ReasoningV: Efficient Verilog Code Generation with Adaptive Hybrid Reasoning Modelcited by 12
  4. 2025TuRTLe: A Unified Evaluation of LLMs for RTL Generationcited by 8
  5. 2025Understanding and Mitigating Errors of LLM-Generated RTL Codecited by 8
  6. 2025Large Language Model for Verilog Code Generation: Literature Review and the Road Aheadcited by 7
  7. 2025Hey AI, Generate Me a Hardware Code! Agentic AI-based Hardware Design & Verificationcited by 5
  8. 2026Dr. RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvementcited by 5
  9. 2025Nexus: A Lightweight and Scalable Multi-Agent Framework for Complex Tasks Automationcited by 4
  10. 2026GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generationcited by 4
  11. 2025Towards Optimal Circuit Generation: Multi-Agent Collaboration Meets Collective Intelligencecited by 1
  12. 2024EDA-Aware RTL Generation with Large Language Modelscited by 0
3 more
  1. 2025PEFA-AI: Advancing Open-source LLMs for RTL generation using Progressive Error Feedback Agentic-AIcited by 0
  2. 2026VHDLSuite: Unified Pipeline for LLM VHDL Generation with Data Synthesis and Evaluationcited by 0
  3. 2026VeriTrace: Human-Like Temporal Exploration Completes Agentic Action Spacecited by 0