mlsanityData to 14 Oct 2026

Towards Optimal Circuit Generation: Multi-Agent Collaboration Meets Collective Intelligence

arXiv 2504.14625 ↗First posted 20 Apr 2025cs.AR cs.AIcited by 1

On the map: LLM agents and tool use → Software engineering coding agents

Abstract (arXiv)

Large language models (LLMs) have transformed code generation, yet their application in hardware design produces gate counts 38%--1075% higher than human designs. We present CircuitMind, a multi-agent framework that achieves human-competitive efficiency through three key innovations: syntax locking (constraining generation to basic logic gates), retrieval-augmented generation (enabling knowledge-driven design), and dual-reward optimization (balancing correctness with efficiency). To evaluate our approach, we introduce TC-Bench, the first gate-level benchmark harnessing collective intelligence from the TuringComplete ecosystem -- a competitive circuit design platform with hundreds of thousands of players. Experiments show CircuitMind enables 55.6% of model implementations to match or exceed top-tier human experts in composite efficiency metrics. Most remarkably, our framework elevates the 14B Phi-4 model to outperform both GPT-4o mini and Gemini 2.0 Flash, achieving efficiency comparable to the top 25% of human experts without requiring specialized training. These innovations establish a new paradigm for hardware optimization where collaborative AI systems leverage collective human expertise to achieve optimal circuit designs. Our model, data, and code are open-source at https://github.com/BUAA-CLab/CircuitMind.

Key facts. Cited by 1 paper in the map (data through 14 Oct 2026). Placed in Software engineering coding agents, one of 16 directions in LLM agents and tool use. Builds on 20 of its 30 references that are in the map. First posted on arXiv 20 Apr 2025.

Builds on

20 of 30 references.

Closest ancestors · 2

Same direction, newest first

  1. 2025RTLSquad: Multi-Agent Based Interpretable RTL Design6 Jan
  2. 2024CoopetitiveV: Leveraging LLM-powered Coopetitive Multi-Agent Prompting for High-quality Verilog Generation15 Dec

Other references · 18

  1. 2023GPT-4 Technical Reportcited by 18,396
  2. 2020Retrieval-Augmented Generation for Knowledge-Intensive NLP Taskscited by 9,297
  3. 2021Evaluating Large Language Models Trained on Codecited by 8,320
  4. 2025DeepSeek-R1: Incentivizing Reasoning Capability in LLMs via Reinforcement Learningcited by 6,330
  5. 2024Qwen2.5 Technical Reportcited by 4,942
  6. 2024Phi-4 Technical Reportcited by 711
  7. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  8. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 200
  9. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 148
  10. 2024BetterV: Controlled Verilog Generation with Discriminative Guidancecited by 100
  11. 2025PRMBench: A Fine-grained and Challenging Benchmark for Process-Level Reward Modelscited by 99
  12. 2024CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarizationcited by 38
6 more
  1. 2024RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projectscited by 26
  2. 2024PyraNet: A Multi-Layered Hierarchical Dataset for Verilogcited by 19
  3. 2024AIvril: AI-Driven RTL Generation With Verification In-The-Loopcited by 15
  4. 2024HiVeGen -- Hierarchical LLM-based Verilog Generation for Scalable Chip Designcited by 13
  5. 2025ResBench: Benchmarking LLM-Generated FPGA Designs with Resource Awarenesscited by 5
  6. 2025GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignmentcited by 1

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 1.

1 paper.

  1. 2026LLMs in Digital EDA: A perspective on shifting roles from Generation to Orchestrationcited by 1

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