Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark
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Abstract (arXiv)
We present our development experience and recent results for the MLPerf Tiny Inference Benchmark on field-programmable gate array (FPGA) platforms. We use the open-source hls4ml and FINN workflows, which aim to democratize AI-hardware codesign of optimized neural networks on FPGAs. We present the design and implementation process for the keyword spotting, anomaly detection, and image classification benchmark tasks. The resulting hardware implementations are quantized, configurable, spatial dataflow architectures tailored for speed and efficiency and introduce new generic optimizations and common workflows developed as a part of this work. The full workflow is presented from quantization-aware training to FPGA implementation. The solutions are deployed on system-on-chip (Pynq-Z2) and pure FPGA (Arty A7-100T) platforms. The resulting submissions achieve latencies as low as 20 μs and energy consumption as low as 30 μJ per inference. We demonstrate how emerging ML benchmarks on heterogeneous hardware platforms can catalyze collaboration and the development of new techniques and more accessible tools.
Key facts. Cited by 9 papers in the map (data through 14 Oct 2026). Builds on 31 of its 58 references that are in the map. First posted on arXiv 23 Jun 2022.
Builds on
31 of 58 references.
References · 31
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19 more
- 2019ToyADMOS: A Dataset of Miniature-Machine Operating Sounds for Anomalous Sound Detectioncited by 44
- 2020Compressing deep neural networks on FPGAs to binary and ternary precision with HLS4MLcited by 42
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Built on by
Citing papers per year: 2022: 1; 2023: 1; 2024: 4; 2025: 2; 2026: 1.
9 papers.
- 2025hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardwarecited by 9
- 2023Tailor: Altering Skip Connections for Resource-Efficient Inferencecited by 6
- 2024rule4ml: An Open-Source Tool for Resource Utilization and Latency Estimation for ML Models on FPGAcited by 3
- 2024Architectural Implications of Neural Network Inference for High Data-Rate, Low-Latency Scientific Applicationscited by 2
- 2024CGRA4ML: A Hardware/Software Framework to Implement Neural Networks for Scientific Edge Computingcited by 2
- 2025wa-hls4ml: A Benchmark and Surrogate Models for hls4ml Resource and Latency Estimationcited by 2
- 2024PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoCcited by 1
- 2026BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networkscited by 1
- 2022Neural network accelerator for quantum controlcited by 0
- 2026BitLogic: Training Framework for Gradient-Based FPGA-Native Neural Networks7 Feb 2026
- 2025hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware1 Dec 2025
- 2025wa-hls4ml: A Benchmark and Surrogate Models for hls4ml Resource and Latency Estimation6 Nov 2025
- 2024CGRA4ML: A Hardware/Software Framework to Implement Neural Networks for Scientific Edge Computing28 Aug 2024
- 2024rule4ml: An Open-Source Tool for Resource Utilization and Latency Estimation for ML Models on FPGA9 Aug 2024
- 2024PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC30 Apr 2024
- 2024Architectural Implications of Neural Network Inference for High Data-Rate, Low-Latency Scientific Applications13 Mar 2024
- 2023Tailor: Altering Skip Connections for Resource-Efficient Inference18 Jan 2023
- 2022Neural network accelerator for quantum control4 Aug 2022
Similar, not cited
Close in wording, no citation either way
- 2024A survey on FPGA-based accelerator for ML models
- 2026Energy Efficient Software Hardware CoDesign for Machine Learning: From TinyML to Large Language Models
- 2025Energy-Efficient FPGA Framework for Non-Quantized Convolutional Neural Networks
- 2025Neural Network Quantization for Microcontrollers: A Comprehensive Survey of Methods, Platforms, and Applications
- 2025SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural Network Accelerators
- 2025FPGA Co-Design for Efficient N:M Sparse and Quantized Model Inference
- 2023Shedding the Bits: Pushing the Boundaries of Quantization with Minifloats on FPGAs
- 2026VQ-LIC: Shared Vector-Quantized Learned Image Compression on a Resource-Constrained FPGA ↗