CIRCUIT: A Benchmark for Circuit Interpretation and Reasoning Capabilities of LLMs
On the map: LLM reasoning → Reasoning for agents, planning and code
Abstract (arXiv)
The role of Large Language Models (LLMs) has not been extensively explored in analog circuit design, which could benefit from a reasoning-based approach that transcends traditional optimization techniques. In particular, despite their growing relevance, there are no benchmarks to assess LLMs' reasoning capability about circuits. Therefore, we created the CIRCUIT dataset consisting of 510 question-answer pairs spanning various levels of analog-circuit-related subjects. The best-performing model on our dataset, GPT-4o, achieves 48.04% accuracy when evaluated on the final numerical answer. To evaluate the robustness of LLMs on our dataset, we introduced a unique feature that enables unit-test-like evaluation by grouping questions into unit tests. In this case, GPT-4o can only pass 27.45% of the unit tests, highlighting that the most advanced LLMs still struggle with understanding circuits, which requires multi-level reasoning, particularly when involving circuit topologies. This circuit-specific benchmark highlights LLMs' limitations, offering valuable insights for advancing their application in analog integrated circuit design.
Key facts. Cited by 11 papers in the map (data through 14 Oct 2026). Placed in Reasoning for agents, planning and code, one of 17 directions in LLM reasoning. Builds on 9 of its 18 references that are in the map. First posted on arXiv 11 Feb 2025.
Builds on
9 of 18 references.
References · 9
- 2020Language Models are Few-Shot Learnerscited by 32,419
- 2021Evaluating Large Language Models Trained on Codecited by 8,320
- 2024Gemini 1.5: Unlocking multimodal understanding across millions of tokens of contextcited by 3,224
- 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
- 2023Solving Challenging Math Word Problems Using GPT-4 Code Interpreter with Code-based Self-Verificationcited by 166
- 2024The Prompt Report: A Systematic Survey of Prompt Engineering Techniquescited by 121
- 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 84
- 2024CHAMP: A Competition-level Dataset for Fine-Grained Analyses of LLMs' Mathematical Reasoning Capabilitiescited by 44
- 2018Learning to Design Circuitscited by 17
Built on by
Citing papers per year: 2025: 5; 2026: 6.
11 papers.
- 2026Frontier-Eng: Benchmarking Self-Evolving Agents on Real-World Engineering Tasks with Generative Optimizationcited by 16
- 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuitscited by 15
- 2025EngTrace: A Symbolic Benchmark for Verifiable Process Supervision of Engineering Reasoningcited by 5
- 2025CircuitSense: A Hierarchical MLLM Benchmark Bridging Visual Comprehension and Symbolic Reasoning in Engineering Design Processcited by 3
- 2025Enhancing Large Language Models for Automated Homework Assessment in Undergraduate Circuit Analysiscited by 1
- 2026CircuChain: Disentangling Competence and Compliance in LLM Circuit Analysiscited by 1
- 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulationcited by 1
- 2025AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Designcited by 0
- 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizingcited by 0
- 2026EDU-CIRCUIT-HW: Evaluating Multimodal Large Language Models on Real-World University-Level STEM Student Handwritten Solutionscited by 0
- 2026Beyond Pixels: Vector-to-Graph Transformation for Reliable Schematic Auditingcited by 0
- 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulation12 Aug 2026
- 2026Frontier-Eng: Benchmarking Self-Evolving Agents on Real-World Engineering Tasks with Generative Optimization14 Apr 2026
- 2026Beyond Pixels: Vector-to-Graph Transformation for Reliable Schematic Auditing12 Feb 2026
- 2026CircuChain: Disentangling Competence and Compliance in LLM Circuit Analysis29 Jan 2026
- 2026EDU-CIRCUIT-HW: Evaluating Multimodal Large Language Models on Real-World University-Level STEM Student Handwritten Solutions23 Jan 2026
- 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizing12 Jan 2026
- 2025AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design25 Dec 2025
- 2025Enhancing Large Language Models for Automated Homework Assessment in Undergraduate Circuit Analysis22 Nov 2025
- 2025EngTrace: A Symbolic Benchmark for Verifiable Process Supervision of Engineering Reasoning3 Nov 2025
- 2025CircuitSense: A Hierarchical MLLM Benchmark Bridging Visual Comprehension and Symbolic Reasoning in Engineering Design Process26 Sep 2025
- 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuits30 May 2025
Similar, not cited
Close in wording, no citation either way
- 2025White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Design
- 2026AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models
- 2024AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAG
- 2025LLM-USO: Large Language Model-based Universal Sizing Optimizer
- 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs
- 2026CircuitReason-1k: Benchmarking Long-Horizon Visual-to-Symbolic Reasoning inElectrical Circuits
- 2025MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs
- 2024AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models