mlsanityData to 14 Oct 2026

AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAG

arXiv 2411.13560 ↗First posted 7 Nov 2024cs.AI cs.AR cs.ETcited by 16

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Abstract (arXiv)

High-performance analog and mixed-signal (AMS) circuits are mainly full-custom designed, which is time-consuming and labor-intensive. A significant portion of the effort is experience-driven, which makes the automation of AMS circuit design a formidable challenge. Large language models (LLMs) have emerged as powerful tools for Electronic Design Automation (EDA) applications, fostering advancements in the automatic design process for large-scale AMS circuits. However, the absence of high-quality datasets has led to issues such as model hallucination, which undermines the robustness of automatically generated circuit designs. To address this issue, this paper introduces AMSnet-KG, a dataset encompassing various AMS circuit schematics and netlists. We construct a knowledge graph with annotations on detailed functional and performance characteristics. Facilitated by AMSnet-KG, we propose an automated AMS circuit generation framework that utilizes the comprehensive knowledge embedded in LLMs. We first formulate a design strategy (e.g., circuit architecture using a number of circuit components) based on required specifications. Next, matched circuit components are retrieved and assembled into a complete topology, and transistor sizing is obtained through Bayesian optimization. Simulation results of the netlist are fed back to the LLM for further topology refinement, ensuring the circuit design specifications are met. We perform case studies of operational amplifier and comparator design to verify the automatic design flow from specifications to netlists with minimal human effort. The dataset used in this paper will be open-sourced upon publishing of this paper.

Key facts. Cited by 16 papers in the map (data through 14 Oct 2026). Builds on 12 of its 49 references that are in the map. First posted on arXiv 7 Nov 2024.

Builds on

12 of 49 references.

References · 12

  1. 2022Chain-of-Thought Prompting Elicits Reasoning in Large Language Modelscited by 12,459
  2. 2015You Only Look Once: Unified, Real-Time Object Detectioncited by 4,852
  3. 2019Optuna: A Next-generation Hyperparameter Optimization Frameworkcited by 2,501
  4. 2021What Makes Good In-Context Examples for GPT-3?cited by 1,195
  5. 2023VeriGen: A Large Language Model for Verilog Code Generationcited by 200
  6. 2022Benchmarking Large Language Models for Automated Verilog RTL Code Generationcited by 115
  7. 2020GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learningcited by 89
  8. 2023CktGNN: Circuit Graph Neural Network for Electronic Design Automationcited by 58
  9. 2023LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automationcited by 40
  10. 2024AMSNet: Netlist Dataset for AMS Circuitscited by 25
  11. 2024AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Designcited by 9
  12. 2021FUBOCO: Structure Synthesis of Basic Op-Amps by FUnctional BlOck COmpositioncited by 2

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2025: 5; 2026: 11.

16 papers.

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  1. 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuitscited by 15
  2. 2025AMSnet 2.0: A Large AMS Database with AI Segmentation for Net Detectioncited by 9
  3. 2025MenTeR: A fully-automated Multi-agenT workflow for end-to-end RF/Analog Circuits Netlist Designcited by 7
  4. 2026AnalogAgent: Self-Improving Analog Circuit Design Automation with LLM Agentscited by 4
  5. 2025Evaluating LLM-based Workflows for Switched-Mode Power Supply Designcited by 2
  6. 2025Dataset Construction for Training LLM to Learn Analog Circuit Knowledgecited by 1
  7. 2026SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flowscited by 1
  8. 2026RF-Agent: A Practical Framework for Building Language Agents for RFIC Designcited by 1
  9. 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuitscited by 0
  10. 2026Surveying GenAI-based Automation in Printed Circuit Board Design and Testcited by 0
  11. 2026AutoVSR: Automatic Visual-to-Symbolic Reasoning for Symbolic Expression Generation from Circuit Schematiccited by 0
  12. 2026EXPLORE: Exploration with Guided Search for Analog Topology Generation using Language Modelscited by 0
4 more
  1. 2026AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Modelscited by 0
  2. 2026PCBnet: A Dataset and Automatic Construction of SPICE Netlists from Schematic Imagescited by 0
  3. 2026Circuit-MLLM: Topological Logic-Guided Latent-Space Visual Reasoning for Circuit Schematic Understandingcited by 0
  4. 2026Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Taskscited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2026CircuitFormer: A Circuit Language Model for Analog Topology Design from Natural Language Prompt
  2. 2025TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuits
  3. 2025CIRCUIT: A Benchmark for Circuit Interpretation and Reasoning Capabilities of LLMs
  4. 2025White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Design
  5. 2025AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design
  6. 2026AutoSizer: Automatic Sizing of Analog and Mixed-Signal Circuits via Large Language Model (LLM) Agents
  7. 2025LLM-based AI Agent for Sizing of Analog and Mixed Signal Circuit
  8. 2025EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit