Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AI
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Abstract (arXiv)
Masala-CHAI is a fully automated framework leveraging large language models (LLMs) to generate Simulation Programs with Integrated Circuit Emphasis (SPICE) netlists. It addresses a long-standing challenge in circuit design automation: automating netlist generation for analog circuits. Automating this workflow could accelerate the creation of fine-tuned LLMs for analog circuit design and verification. In this work, we identify key challenges in automated netlist generation and evaluate multimodal capabilities of state-of-the-art LLMs, particularly GPT-4, in addressing them. We propose a three-step workflow to overcome existing limitations: labeling analog circuits, prompt tuning, and netlist verification. This approach enables end-to-end SPICE netlist generation from circuit schematic images, tackling the persistent challenge of accurate netlist generation. We utilize Masala-CHAI to collect a corpus of 7,500 schematics that span varying complexities in 10 textbooks and benchmark various open source and proprietary LLMs. Models fine-tuned on Masala-CHAI when used in LLM-agentic frameworks such as AnalogCoder achieve a notable 46% improvement in Pass@1 scores. We open-source our dataset and code for community-driven development.
Key facts. Cited by 17 papers in the map (data through 7 Oct 2026). First posted on arXiv 21 Nov 2024.
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Citing papers per year: 2025: 5; 2026: 12.
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- 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuitscited by 14
- 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 14
- 2025MuaLLM: A Multimodal Large Language Model Agent for Circuit Design Assistance with Hybrid Contextual Retrieval-Augmented Generationcited by 8
- 2025Image2Net: Datasets, Benchmark and Hybrid Framework to Convert Analog Circuit Diagrams into Netlistscited by 7
- 2026SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligencecited by 4
- 2025Evaluating LLM-based Workflows for Switched-Mode Power Supply Designcited by 2
- 2026OmniSch: A Multimodal PCB Schematic Benchmark For Structured Diagram Visual Reasoningcited by 2
- 2026AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrievalcited by 1
- 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulationcited by 1
- 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuitscited by 0
- 2026Surveying GenAI-based Automation in Printed Circuit Board Design and Testcited by 0
- 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligencecited by 0
5 more
- 2026Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generationcited by 0
- 2026PICasso: An AI-Enabled Design Framework for Autonomous Optimization of Silicon Photonic Devicescited by 0
- 2026Analog-DB: An Agent-First Analog Integrated Circuit Database, From Blocks to Systemscited by 0
- 2026Circuit-MLLM: Topological Logic-Guided Latent-Space Visual Reasoning for Circuit Schematic Understandingcited by 0
- 2026Validation and Simulation Catch Different Errors: Four Levels of Evaluation for LLM-Generated Circuitscited by 0
- 2026Validation and Simulation Catch Different Errors: Four Levels of Evaluation for LLM-Generated Circuits21 Sep 2026
- 2026Circuit-MLLM: Topological Logic-Guided Latent-Space Visual Reasoning for Circuit Schematic Understanding14 Sep 2026
- 2026Analog-DB: An Agent-First Analog Integrated Circuit Database, From Blocks to Systems1 Sep 2026
- 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulation12 Aug 2026
- 2026Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generation15 Jul 2026
- 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence2 Jul 2026
- 2026Surveying GenAI-based Automation in Printed Circuit Board Design and Test10 Jun 2026
- 2026PICasso: An AI-Enabled Design Framework for Autonomous Optimization of Silicon Photonic Devices28 May 2026
- 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuits2 May 2026
- 2026AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrieval25 Apr 2026
- 2026OmniSch: A Multimodal PCB Schematic Benchmark For Structured Diagram Visual Reasoning31 Mar 2026
- 2026SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence29 Jan 2026
5 more
- 2025MuaLLM: A Multimodal Large Language Model Agent for Circuit Design Assistance with Hybrid Contextual Retrieval-Augmented Generation11 Aug 2025
- 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs4 Aug 2025
- 2025Evaluating LLM-based Workflows for Switched-Mode Power Supply Design14 Jul 2025
- 2025Image2Net: Datasets, Benchmark and Hybrid Framework to Convert Analog Circuit Diagrams into Netlists27 Jun 2025
- 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuits30 May 2025
- 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuitscited by 14
- 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 14
- 2025Image2Net: Datasets, Benchmark and Hybrid Framework to Convert Analog Circuit Diagrams into Netlistscited by 7
- 2026SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligencecited by 4
- 2025Evaluating LLM-based Workflows for Switched-Mode Power Supply Designcited by 2
- 2026AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrievalcited by 1
- 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulationcited by 1
- 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuitscited by 0
- 2026Surveying GenAI-based Automation in Printed Circuit Board Design and Testcited by 0
- 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligencecited by 0
- 2026Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generationcited by 0
- 2026PICasso: An AI-Enabled Design Framework for Autonomous Optimization of Silicon Photonic Devicescited by 0
12 most cited of 14 All 14 (JSON)
- 2026Validation and Simulation Catch Different Errors: Four Levels of Evaluation for LLM-Generated Circuits21 Sep 2026
- 2026Analog-DB: An Agent-First Analog Integrated Circuit Database, From Blocks to Systems1 Sep 2026
- 2026NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulation12 Aug 2026
- 2026Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generation15 Jul 2026
- 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence2 Jul 2026
- 2026Surveying GenAI-based Automation in Printed Circuit Board Design and Test10 Jun 2026
- 2026PICasso: An AI-Enabled Design Framework for Autonomous Optimization of Silicon Photonic Devices28 May 2026
- 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuits2 May 2026
- 2026AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrieval25 Apr 2026
- 2026SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence29 Jan 2026
- 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs4 Aug 2025
- 2025Evaluating LLM-based Workflows for Switched-Mode Power Supply Design14 Jul 2025
12 newest of 14 All 14 (JSON)