mlsanityData to 7 Oct 2026

AMSNet: Netlist Dataset for AMS Circuits

arXiv 2405.09045 ↗First posted 15 May 2024cs.CVcited by 24

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Abstract (arXiv)

Today's analog/mixed-signal (AMS) integrated circuit (IC) designs demand substantial manual intervention. The advent of multimodal large language models (MLLMs) has unveiled significant potential across various fields, suggesting their applicability in streamlining large-scale AMS IC design as well. A bottleneck in employing MLLMs for automatic AMS circuit generation is the absence of a comprehensive dataset delineating the schematic-netlist relationship. We therefore design an automatic technique for converting schematics into netlists, and create dataset AMSNet, encompassing transistor-level schematics and corresponding SPICE format netlists. With a growing size, AMSNet can significantly facilitate exploration of MLLM applications in AMS circuit design. We have made an initial set of netlists public, and will make both our netlist generation tool and the full dataset available upon publishing of this paper.

Key facts. Cited by 24 papers in the map (data through 7 Oct 2026). Builds on 6 of its 25 references that are in the map. First posted on arXiv 15 May 2024.

Builds on

6 of 25 references.

References · 6

  1. 2023RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Modelcited by 143
  2. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 136
  3. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 118
  4. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 69
  5. 2023GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Modelscited by 59
  6. 2024KATO: Knowledge Alignment and Transfer for Transistor Sizing of Different Design and Technologycited by 2

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Cited by year (2026 to 7 Oct)

Citing papers per year: 2024: 3; 2025: 8; 2026: 13.

24 papers.

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  1. 2024AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAGcited by 16
  2. 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuitscited by 14
  3. 2025AMSnet 2.0: A Large AMS Database with AI Segmentation for Net Detectioncited by 9
  4. 2025MuaLLM: A Multimodal Large Language Model Agent for Circuit Design Assistance with Hybrid Contextual Retrieval-Augmented Generationcited by 8
  5. 2024SPICED: Syntactical Bug and Trojan Pattern Identification in A/MS Circuits using LLM-Enhanced Detectioncited by 7
  6. 2025Image2Net: Datasets, Benchmark and Hybrid Framework to Convert Analog Circuit Diagrams into Netlistscited by 7
  7. 2025TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuitscited by 7
  8. 2024Are LLMs Any Good for High-Level Synthesis?cited by 6
  9. 2025A Large Language Model-based Multi-Agent Framework for Analog Circuits' Sizing Relationships Extractioncited by 3
  10. 2026OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generationcited by 2
  11. 2026OmniSch: A Multimodal PCB Schematic Benchmark For Structured Diagram Visual Reasoningcited by 2
  12. 2025Dataset Construction for Training LLM to Learn Analog Circuit Knowledgecited by 1
12 more
  1. 2026AnalogRetriever: Learning Cross-Modal Representations for Analog Circuit Retrievalcited by 1
  2. 2026SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flowscited by 1
  3. 2025D2S-FLOW: Automated Parameter Extraction from Datasheets for SPICE Model Generation Using Large Language Modelscited by 0
  4. 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizingcited by 0
  5. 2026DiagramNet: An End-to-End Recognition Framework and Dataset for Non-Standard System-Level Diagramscited by 0
  6. 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuitscited by 0
  7. 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligencecited by 0
  8. 2026EXPLORE: Exploration with Guided Search for Analog Topology Generation using Language Modelscited by 0
  9. 2026Towards Reliable AI-Assisted Analog Design: Template-Constrained LLM Agents for SAR ADC Generationcited by 0
  10. 2026ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuitscited by 0
  11. 2026PCBnet: A Dataset and Automatic Construction of SPICE Netlists from Schematic Imagescited by 0
  12. 2026Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Taskscited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2025CIRCUIT: A Benchmark for Circuit Interpretation and Reasoning Capabilities of LLMs
  2. 2025EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit
  3. 2025LLM-based AI Agent for Sizing of Analog and Mixed Signal Circuit
  4. 2026AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models
  5. 2024ChipExpert: The Open-Source Integrated-Circuit-Design-Specific Large Language Model
  6. 2026AutoSizer: Automatic Sizing of Analog and Mixed-Signal Circuits via Large Language Model (LLM) Agents
  7. 2025AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design
  8. 2025MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs