mlsanityData to 7 Oct 2026

AMSnet 2.0: A Large AMS Database with AI Segmentation for Net Detection

arXiv 2505.09155 ↗First posted 14 May 2025cs.CVcited by 9

On the map: Multimodal LLMs / vision-language models → Chart understanding and anomaly detection

Abstract (arXiv)

Current multimodal large language models (MLLMs) struggle to understand circuit schematics due to their limited recognition capabilities. This could be attributed to the lack of high-quality schematic-netlist training data. Existing work such as AMSnet applies schematic parsing to generate netlists. However, these methods rely on hard-coded heuristics and are difficult to apply to complex or noisy schematics in this paper. We therefore propose a novel net detection mechanism based on segmentation with high robustness. The proposed method also recovers positional information, allowing digital reconstruction of schematics. We then expand AMSnet dataset with schematic images from various sources and create AMSnet 2.0. AMSnet 2.0 contains 2,686 circuits with schematic images, Spectre-formatted netlists, OpenAccess digital schematics, and positional information for circuit components and nets, whereas AMSnet only includes 792 circuits with SPICE netlists but no digital schematics.

Key facts. Cited by 9 papers in the map (data through 7 Oct 2026). Placed in Chart understanding and anomaly detection, one of 16 directions in Multimodal LLMs / vision-language models. Builds on 11 of its 17 references that are in the map. First posted on arXiv 14 May 2025.

Builds on

11 of 17 references.

References · 11

  1. 2015U-Net: Convolutional Networks for Biomedical Image Segmentationcited by 19,604
  2. 2019YOLACT: Real-time Instance Segmentationcited by 441
  3. 2020A Survey on Instance Segmentation: State of the artcited by 85
  4. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 82
  5. 2024ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Modelscited by 44
  6. 2025AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologiescited by 35
  7. 2024LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuitscited by 32
  8. 2024AMSNet: Netlist Dataset for AMS Circuitscited by 24
  9. 2024LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Designcited by 24
  10. 2024AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAGcited by 16
  11. 2024DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agentcited by 15

Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2025: 1; 2026: 8.

9 papers.

  1. 2026OmniSch: A Multimodal PCB Schematic Benchmark For Structured Diagram Visual Reasoningcited by 2
  2. 2025Dataset Construction for Training LLM to Learn Analog Circuit Knowledgecited by 1
  3. 2026DiagramNet: An End-to-End Recognition Framework and Dataset for Non-Standard System-Level Diagramscited by 0
  4. 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuitscited by 0
  5. 2026SPARC: A Multi-Agent System for Electrical Circuit Question Answeringcited by 0
  6. 2026PCBnet: A Dataset and Automatic Construction of SPICE Netlists from Schematic Imagescited by 0
  7. 2026Analog-DB: An Agent-First Analog Integrated Circuit Database, From Blocks to Systemscited by 0
  8. 2026Circuit-MLLM: Topological Logic-Guided Latent-Space Visual Reasoning for Circuit Schematic Understandingcited by 0
  9. 2026Validation and Simulation Catch Different Errors: Four Levels of Evaluation for LLM-Generated Circuitscited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2026SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence
  2. 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence
  3. 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuits
  4. 2025NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph
  5. 2025EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit
  6. 2025CIRCUIT: A Benchmark for Circuit Interpretation and Reasoning Capabilities of LLMs
  7. 2026Hierarchical Sparse Circuit Extraction from Billion-Parameter Language Models through Scalable Attribution Graph Decomposition
  8. 2025GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment