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D2S-FLOW: Automated Parameter Extraction from Datasheets for SPICE Model Generation Using Large Language Models

arXiv 2502.16540 ↗First posted 23 Feb 2025cs.CL cs.AI cs.ARcited by 0

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Abstract (arXiv)

In electronic design, engineers often manually search through extensive documents to retrieve component parameters required for constructing SPICE models, a process that is both labor-intensive and time-consuming. To address this challenge, we present an automated framework called D2S-FLOW that leverages large language models (LLMs) to extract electrical parameters from datasheets and generate SPICE models with high precision and efficiency, significantly reducing the need for manual intervention. Unlike traditional RAG systems, D2S-FLOW employs a workflow to enhance precision in handling unstructured documents and inconsistent naming conventions through three innovative mechanisms: Attention-Guided Document Focusing (AGDF), Hierarchical Document-Enhanced Retrieval (HDER), and Heterogeneous Named Entity Normalization (HNEN). AGDF narrows retrieval to user-selected documents, HDER utilizes document structure for precise parameter localization, and HNEN standardizes terminology via semantic inference. Experimental results demonstrate that the framework achieves an Exact Match (EM) of 0.86, an F1 score of 0.92, and an Exact Correctness (EC) of 0.96, outperforming the strongest baseline by 19.4%, 5.7%, and 13.1%, respectively. Additionally, it reduces API token consumption by 38% and minimizes the irrelevant information ratio to 4%, showcasing substantial improvements in resource efficiency. This research provides an effective automated solution for circuit design.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 23 of its 38 references that are in the map. First posted on arXiv 23 Feb 2025.

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References · 23

  1. 2020Language Models are Few-Shot Learnerscited by 32,419
  2. 2022Chain-of-Thought Prompting Elicits Reasoning in Large Language Modelscited by 12,459
  3. 2020Retrieval-Augmented Generation for Knowledge-Intensive NLP Taskscited by 9,297
  4. 2022PaLM: Scaling Language Modeling with Pathwayscited by 5,326
  5. 2023Tree of Thoughts: Deliberate Problem Solving with Large Language Modelscited by 3,211
  6. 2023Retrieval-Augmented Generation for Large Language Models: A Surveycited by 2,212
  7. 2024Benchmarking Retrieval-Augmented Generation for Medicinecited by 331
  8. 2023ChatDoctor: A Medical Chat Model Fine-Tuned on a Large Language Model Meta-AI (LLaMA) Using Medical Domain Knowledgecited by 325
  9. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 174
  10. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 122
  11. 2023Evaluating Open-Domain Question Answering in the Era of Large Language Modelscited by 111
  12. 2020Deep Learning for Financial Applications : A Surveycited by 91
11 more
  1. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 84
  2. 2024CBR-RAG: Case-Based Reasoning for Retrieval Augmented Generation in LLMs for Legal Question Answeringcited by 72
  3. 2022Legal Prompting: Teaching a Language Model to Think Like a Lawyercited by 60
  4. 2023LLM4EDA: Emerging Progress in Large Language Models for Electronic Design Automationcited by 40
  5. 2024Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QAcited by 28
  6. 2024AMSNet: Netlist Dataset for AMS Circuitscited by 25
  7. 2024Strategic Chain-of-Thought: Guiding Accurate Reasoning in LLMs through Strategy Elicitationcited by 19
  8. 2024LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generationcited by 13
  9. 2024RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization with Knowledge-infused Reinforcement Learningcited by 9
  10. 2024An Empirical Study of Retrieval Augmented Generation with Chain-of-Thoughtcited by 6
  11. 2024DocEDA: Automated Extraction and Design of Analog Circuits from Documents with Large Language Modelcited by 1

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  7. 2025MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs
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