mlsanityData to 7 Oct 2026

ChiPFormer: Transferable Chip Placement via Offline Decision Transformer

arXiv 2306.14744 ↗First posted 26 Jun 2023cs.LG cs.AIcited by 42

On the map: Offline RL and imitation learning from data → Decision transformers and sequence modeling

Abstract (arXiv)

Placement is a critical step in modern chip design, aiming to determine the positions of circuit modules on the chip canvas. Recent works have shown that reinforcement learning (RL) can improve human performance in chip placement. However, such an RL-based approach suffers from long training time and low transfer ability in unseen chip circuits. To resolve these challenges, we cast the chip placement as an offline RL formulation and present ChiPFormer that enables learning a transferable placement policy from fixed offline data. ChiPFormer has several advantages that prior arts do not have. First, ChiPFormer can exploit offline placement designs to learn transferable policies more efficiently in a multi-task setting. Second, ChiPFormer can promote effective finetuning for unseen chip circuits, reducing the placement runtime from hours to minutes. Third, extensive experiments on 32 chip circuits demonstrate that ChiPFormer achieves significantly better placement quality while reducing the runtime by 10x compared to recent state-of-the-art approaches in both public benchmarks and realistic industrial tasks. The deliverables are released at https://sites.google.com/view/chipformer/home.

Key facts. Cited by 42 papers in the map (data through 7 Oct 2026). Placed in Decision transformers and sequence modeling, one of 13 directions in Offline RL and imitation learning from data. Builds on 28 of its 70 references that are in the map. First posted on arXiv 26 Jun 2023.

Builds on

28 of 70 references.

Closest ancestors · 3

Same direction, newest first

  1. 2022Online Decision Transformer11 Feb
  2. 2021Generalized Decision Transformer for Offline Hindsight Information Matching19 Nov
  3. 2021Decision Transformer: Reinforcement Learning via Sequence Modeling2 Jun

Other references · 25

  1. 2017Proximal Policy Optimization Algorithmscited by 14,441
  2. 2016Semi-Supervised Classification with Graph Convolutional Networkscited by 11,282
  3. 2017Graph Attention Networkscited by 8,854
  4. 2020Offline Reinforcement Learning: Tutorial, Review, and Perspectives on Open Problemscited by 1,873
  5. 2020D4RL: Datasets for Deep Data-Driven Reinforcement Learningcited by 1,406
  6. 2016Variational Graph Auto-Encoderscited by 1,373
  7. 2018Off-Policy Deep Reinforcement Learning without Explorationcited by 1,227
  8. 2021Offline-to-Online Reinforcement Learning via Balanced Replay and Pessimistic Q-Ensemblecited by 211
  9. 2021RvS: What is Essential for Offline RL via Supervised Learning?cited by 184
  10. 2021Policy Finetuning: Bridging Sample-Efficient Offline and Online Reinforcement Learningcited by 157
  11. 2021Actionable Models: Unsupervised Offline Reinforcement Learning of Robotic Skillscited by 125
  12. 2021On Joint Learning for Solving Placement and Routing in Chip Designcited by 44
13 more
  1. 2023Learning Cut Selection for Mixed-Integer Linear Programming via Hierarchical Sequence Modelcited by 44
  2. 2022MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learningcited by 43
  3. 2023Behavior Proximal Policy Optimizationcited by 43
  4. 2022DARA: Dynamics-Aware Reward Augmentation in Offline Reinforcement Learningcited by 40
  5. 2023Beyond Reward: Offline Preference-guided Policy Optimizationcited by 35
  6. 2021Sample-Efficient Reinforcement Learning via Conservative Model-Based Actor-Criticcited by 23
  7. 2021Offline Preference-Based Apprenticeship Learningcited by 17
  8. 2019The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-ready 1.7GHz 64bit RISC-V Core in 22nm FDSOI Technologycited by 16
  9. 2021Learn Goal-Conditioned Policy with Intrinsic Motivation for Deep Reinforcement Learningcited by 15
  10. 2021Unsupervised Domain Adaptation with Dynamics-Aware Rewards in Reinforcement Learningcited by 15
  11. 2020Placement in Integrated Circuits using Cyclic Reinforcement Learning and Simulated Annealingcited by 11
  12. 2022Efficient Exploration in Resource-Restricted Reinforcement Learningcited by 10
  13. 2021Delving into Macro Placement with Reinforcement Learningcited by 8

Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2023: 3; 2024: 19; 2025: 7; 2026: 13.

42 papers.

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By area:

  1. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 82
  2. 2023Macro Placement by Wire-Mask-Guided Black-Box Optimizationcited by 23
  3. 2024AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Modelscited by 17
  4. 2024Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithmscited by 12
  5. 2024LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generationcited by 11
  6. 2024Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimizationcited by 10
  7. 2024Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledgecited by 10
  8. 2024Reinforcement Learning Policy as Macro Regulator Rather than Macro Placercited by 10
  9. 2024Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designscited by 9
  10. 2024INSIGHT: Universal Neural Simulator for Analog Circuits Harnessing Autoregressive Transformerscited by 8
  11. 2023Offline Imitation Learning with Variational Counterfactual Reasoningcited by 7
  12. 2023A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Designcited by 6
30 more
  1. 2025Evolution of Optimization Algorithms for Global Placement via Large Language Modelscited by 6
  2. 2024PreRoutGNN for Timing Prediction with Order Preserving Partition: Global Circuit Pre-training, Local Delay Learning and Attentional Cell Modelingcited by 5
  3. 2024That Chip Has Sailed: A Critique of Unfounded Skepticism Around AI for Chip Designcited by 5
  4. 2024Effective Analog ICs Floorplanning with Relational Graph Neural Networks and Reinforcement Learningcited by 5
  5. 2024DIDI: Diffusion-Guided Diversity for Offline Behavioral Generationcited by 4
  6. 2025BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placementcited by 4
  7. 2024FloorSet -- a VLSI Floorplanning Dataset with Design Constraints of Real-World SoCscited by 2
  8. 2026CODMAS: A Dialectic Multi-Agent Collaborative Framework for Structured RTL Optimizationcited by 2
  9. 2024RoutePlacer: An End-to-End Routability-Aware Placer with Graph Neural Networkcited by 1
  10. 2024Decision Transformer for Enhancing Neural Local Search on the Job Shop Scheduling Problemcited by 1
  11. 2026See it to Place it: Evolving Macro Placements with Vision-Language Modelscited by 1
  12. 2024FPGA Divide-and-Conquer Placement using Deep Reinforcement Learningcited by 0
  13. 2024Addressing Large Action Spaces in 3D Floorplanning via Spatial Generalizationcited by 0
  14. 2024P-MOSS: Scheduling Main-Memory Indexes Over NUMA Servers Using Next Token Predictioncited by 0
  15. 2025TransPlace: Transferable Circuit Global Placement via Graph Neural Networkcited by 0
  16. 2025GNN-DT: Graph Neural Network Enhanced Decision Transformer for Efficient Optimization in Dynamic Environmentscited by 0
  17. 2025SAGE: Steering Dialog Generation with Future-Aware State-Action Augmentationcited by 0
  18. 2025Advancing Routing-Awareness in Analog ICs Floorplanningcited by 0
  19. 2025Re2MaP: Macro Placement by Recursively Prototyping and Packing Tree-based Relocatingcited by 0
  20. 2026RulePlanner: All-in-One Reinforcement Learner for Unifying Design Rules in 3D Floorplanningcited by 0
  21. 2026TDPNavigator-Placer: Thermal- and Wirelength-Aware Chiplet Placement in 2.5D Systems Through Multi-Agent Reinforcement Learningcited by 0
  22. 2026FlowPlace: Flow Matching for Chip Placementcited by 0
  23. 2026Graph Computation Meets Circuit Algebra: A Task-Aligned Analysis of Graph Neural Networks for Electronic Design Automationcited by 0
  24. 2026PhysEDA: Physics-Aware Learning Framework for Efficient EDA With Manhattan Distance Decaycited by 0
  25. 2026Physics-Guided Geometric Diffusion for Macro Placement Generationcited by 0
  26. 2026StepPRM-RTL: Stepwise Process-Reward Guided LLM Fine-Tuning for Enhanced RTL Synthesiscited by 0
  27. 2026Agentic Electronic Design Automation: A Handoff Perspectivecited by 0
  28. 2026PPAPlace: Differentiable Cross-Stage Objectives for Chip Placement Optimizationcited by 0
  29. 2026PlaceReasoner-Beta: Reasoning-Driven Macro Placement and Benchmarkingcited by 0
  30. 2026CARVE: Breaking Data Barriers in Chip Placement by Harnessing Reusable Expertisecited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2024Chip Placement with Diffusion Models
  2. 2026How Can Reinforcement Learning Achieve Expert-level Placement?
  3. 2026Trinity: One Differentiable Physics for Training, Refining and Scoring Generative Floorplanners
  4. 2026GPlaceRL: An Open-Source Graph Reinforcement Learning Framework for Detailed Placement
  5. 2023INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search
  6. 2026Retrieve, Schedule, Reflect: LLM Agents for Chip QoR Optimization
  7. 2024ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation
  8. 2025CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design