mlsanityData to 7 Oct 2026

LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generation

arXiv 2406.05250 ↗First posted 7 Jun 2024cs.AI cs.AR cs.LGcited by 11

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Abstract (arXiv)

Analog layout synthesis faces significant challenges due to its dependence on manual processes, considerable time requirements, and performance instability. Current Bayesian Optimization (BO)-based techniques for analog layout synthesis, despite their potential for automation, suffer from slow convergence and extensive data needs, limiting their practical application. This paper presents the textttLLANA framework, a novel approach that leverages Large Language Models (LLMs) to enhance BO by exploiting the few-shot learning abilities of LLMs for more efficient generation of analog design-dependent parameter constraints. Experimental results demonstrate that textttLLANA not only achieves performance comparable to state-of-the-art (SOTA) BO methods but also enables a more effective exploration of the analog circuit design space, thanks to LLM's superior contextual understanding and learning efficiency. The code is available at https://github.com/dekura/LLANA.

Key facts. Cited by 11 papers in the map (data through 7 Oct 2026). Builds on 29 of its 49 references that are in the map. First posted on arXiv 7 Jun 2024.

Builds on

29 of 49 references.

References · 29

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17 more
  1. 2023ChatEDA: A Large Language Model Powered Autonomous Agent for EDAcited by 118
  2. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 82
  3. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 69
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  14. 2022Fuse and Mix: MACAM-Enabled Analog Activation for Energy-Efficient Neural Accelerationcited by 4
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  17. 2024Efficient Bilevel Source Mask Optimizationcited by 1

Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2024: 2; 2025: 6; 2026: 3.

11 papers.

  1. 2025A Survey of Research in Large Language Models for Electronic Design Automationcited by 38
  2. 2024LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuitscited by 22
  3. 2025Adaptive Kernel Design for Bayesian Optimization Is a Piece of CAKE with LLMscited by 15
  4. 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 14
  5. 2025PABBO: Preferential Amortized Black-Box Optimizationcited by 7
  6. 2024CktGen: Automated Analog Circuit Design with Generative Artificial Intelligencecited by 1
  7. 2026Can an Actor-Critic Optimization Framework Improve Analog Design?cited by 1
  8. 2025D2S-FLOW: Automated Parameter Extraction from Datasheets for SPICE Model Generation Using Large Language Modelscited by 0
  9. 2025AI-Powered Agile Analog Circuit Design and Optimizationcited by 0
  10. 2026Surveying GenAI-based Automation in Printed Circuit Board Design and Testcited by 0
  11. 2026Harnessing Large Language Models to Compile Task-Relevant Context into Bayesian Optimisationcited by 0