Delving into Macro Placement with Reinforcement Learning
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Abstract (arXiv)
In physical design, human designers typically place macros via trial and error, which is a Markov decision process. Reinforcement learning (RL) methods have demonstrated superhuman performance on the macro placement. In this paper, we propose an extension to this prior work (Mirhoseini et al., 2020). We first describe the details of the policy and value network architecture. We replace the force-directed method with DREAMPlace for placing standard cells in the RL environment. We also compare our improved method with other academic placers on public benchmarks.
Key facts. Cited by 8 papers in the map (data through 7 Oct 2026). Builds on 0 of its 7 references that are in the map. First posted on arXiv 6 Sep 2021.
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Citing papers per year: 2022: 2; 2023: 2; 2024: 2; 2025: 2.
8 papers.
- 2022MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learningcited by 43
- 2023ChiPFormer: Transferable Chip Placement via Offline Decision Transformercited by 42
- 2024LLM4SecHW: Leveraging Domain Specific Large Language Model for Hardware Debuggingcited by 18
- 2024That Chip Has Sailed: A Critique of Unfounded Skepticism Around AI for Chip Designcited by 5
- 2022Theta-Resonance: A Single-Step Reinforcement Learning Method for Design Space Explorationcited by 4
- 2023The False Dawn: Reevaluating Google's Reinforcement Learning for Chip Macro Placementcited by 2
- 2025CORE: Constraint-Aware One-Step Reinforcement Learning for Simulation-Guided Neural Network Accelerator Designcited by 1
- 2025Inverse Design in Distributed Circuits Using Single-Step Reinforcement Learningcited by 0
- 2025CORE: Constraint-Aware One-Step Reinforcement Learning for Simulation-Guided Neural Network Accelerator Design4 Jun 2025
- 2025Inverse Design in Distributed Circuits Using Single-Step Reinforcement Learning2 Jun 2025
- 2024That Chip Has Sailed: A Critique of Unfounded Skepticism Around AI for Chip Design15 Nov 2024
- 2024LLM4SecHW: Leveraging Domain Specific Large Language Model for Hardware Debugging28 Jan 2024
- 2023ChiPFormer: Transferable Chip Placement via Offline Decision Transformer26 Jun 2023
- 2023The False Dawn: Reevaluating Google's Reinforcement Learning for Chip Macro Placement16 Jun 2023
- 2022MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learning24 Nov 2022
- 2022Theta-Resonance: A Single-Step Reinforcement Learning Method for Design Space Exploration3 Nov 2022