Trinity: One Differentiable Physics for Training, Refining and Scoring Generative Floorplanners
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Abstract (arXiv)
Floorplanning arranges the blocks of a chip and decides their shapes under objectives that press blocks together, short wirelength and a small outline, and constraints that hold them apart, non-overlap, clusters, MIB shapes and boundary blocks. Recent diffusion placers train on reference layouts alone and leave this coupled system to guidance, post-hoc loops and a legalizer, reporting only the endpoint, which hides what the generator contributes. We re-implement four of them under one recipe on FloorSet, score raw, refined and legalized layouts on one scale, and propose Trinity, a flow-matching floorplanner whose six differentiable functions for the constraints and objectives are its training loss term, the energy of a closed-form refiner after sampling and the base of a soft cost for every stage. The network thus learns the correction prior placers apply in their samplers, and sampling needs no guidance. Stage by stage, the training term lowers a plain transformer's raw soft cost by 26% and matters most at short budgets, the shared refiner decides more of the final cost than the generator and matches a ported placer's loop in 16 to 660 times fewer steps, Trinity's refined soft cost is 36% below the best ported pipeline, the soft cost ranks settings as the contest's hard cost does, and on the FloorSet val set the pipeline reaches a mean hard cost of 1.014 in 1.63 s per case.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 8 of its 91 references that are in the map. First posted on arXiv 4 Oct 2026.
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References · 8
- 2022Classifier-Free Diffusion Guidancecited by 5,847
- 2020A Generalization of Transformer Networks to Graphscited by 661
- 2024Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithmscited by 14
- 2022CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)cited by 11
- 2025BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placementcited by 5
- 2025DiffPlace: A Conditional Diffusion Framework for Simultaneous VLSI Placement Beyond Sequential Paradigmscited by 1
- 2026FlowPlace: Flow Matching for Chip Placementcited by 1
- 2026Physics-Guided Geometric Diffusion for Macro Placement Generationcited by 1
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- 2026RulePlanner: All-in-One Reinforcement Learner for Unifying Design Rules in 3D Floorplanning
- 2026Boundary-Constrained Diffusion Models for Floorplan Generation: Balancing Realism and Diversity
- 2026See it to Place it: Evolving Macro Placements with Vision-Language Models
- 2022HouseDiffusion: Vector Floorplan Generation via a Diffusion Model with Discrete and Continuous Denoising
- 2025Eliminating Rasterization: Direct Vector Floor Plan Generation with DiffPlanner
- 2026Rethinking Floorplan Generation with Space Syntax: From Design Theory to Model Improvement
- 2026Directly from Alpha to Omega: Controllable End-to-End Vector Floor Plan Generation ↗
- 2025FloorPlan-DeepSeek (FPDS): A multimodal approach to floorplan generation using vector-based next room prediction