mlsanityData to 14 Oct 2026

ITERTL: An Iterative Framework for Fine-tuning LLMs for RTL Code Generation

arXiv 2407.12022 ↗First posted 28 Jun 2024cs.CL cs.AIcited by 9

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Abstract (arXiv)

Recently, large language models (LLMs) have demonstrated excellent performance, inspiring researchers to explore their use in automating register transfer level (RTL) code generation and improving hardware design efficiency. However, the existing approaches to fine-tune LLMs for RTL generation typically are conducted on fixed datasets, which do not fully stimulate the capability of LLMs and require large amounts of reference data, which are costly to acquire. To mitigate these issues, we innovatively introduce an iterative training paradigm named ITERTL. During each iteration, samples are drawn from the model trained in the previous cycle. Then these new samples are employed for training in current loop. Furthermore, we introduce a plug-and-play data filtering strategy, thereby encouraging the model to generate high-quality, self-contained code. Our model outperforms GPT4 and state-of-the-art (SOTA) open-source models, achieving remarkable 53.8% pass@1 rate on VerilogEval-human benchmark. Under similar conditions of data quantity and quality, our approach significantly outperforms the baseline. Extensive experiments validate the effectiveness of the proposed method.

Key facts. Cited by 9 papers in the map (data through 14 Oct 2026). Builds on 19 of its 28 references that are in the map. First posted on arXiv 28 Jun 2024.

Builds on

19 of 28 references.

References · 19

  1. 2022Training language models to follow instructions with human feedbackcited by 15,971
  2. 2023Llama 2: Open Foundation and Fine-Tuned Chat Modelscited by 13,028
  3. 2023Direct Preference Optimization: Your Language Model is Secretly a Reward Modelcited by 8,065
  4. 2024DeepSeek-Coder: When the Large Language Model Meets Programming -- The Rise of Code Intelligencecited by 1,181
  5. 2023RRHF: Rank Responses to Align Language Models with Human Feedback without tearscited by 463
  6. 2024DeepSeek-Coder-V2: Breaking the Barrier of Closed-Source Models in Code Intelligencecited by 331
  7. 2023Statistical Rejection Sampling Improves Preference Optimizationcited by 323
  8. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  9. 2019SPoC: Search-based Pseudocode to Codecited by 176
  10. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 174
  11. 2022BRIO: Bringing Order to Abstractive Summarizationcited by 161
  12. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 140
7 more
  1. 2022Benchmarking Large Language Models for Automated Verilog RTL Code Generationcited by 115
  2. 2023RLTF: Reinforcement Learning from Unit Test Feedbackcited by 114
  3. 2023ChipGPT: How far are we from natural language hardware designcited by 105
  4. 2024BetterV: Controlled Verilog Generation with Discriminative Guidancecited by 100
  5. 2023AutoChip: Automating HDL Generation Using LLM Feedbackcited by 83
  6. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 71
  7. 2023Policy Optimization in RLHF: The Impact of Out-of-preference Datacited by 35

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2024: 1; 2025: 6; 2026: 2.

9 papers.