Inspector: Conversational and Lightweight Analyzer of Analog Circuit Layouts Using LLM and CNNs
Not on the map. Why?
Abstract (arXiv)
The integration of artificial intelligence into computer-aided design frameworks has sparked a shift in the design of analog integrated circuits (ICs), transitioning the field from using manual and algorithmic-based solutions to adopting automated and intelligent paradigms. In this scenario, the GDSII file represents the industry-standard database containing the ultimate and most accurate source of information of the analog circuit, encapsulating the complex physical geometries and parasitic realities that define tape out performance. This paper proposes a novel framework that combines fine-tuned LLMs and CNNs to analyze GDSII files of analog circuits, enabling a conversational interface between the tool and the designers. Experimental results using thousands of analog designs across four realistic tasks demonstrate that the proposed solution outperforms state-of-the-art general-purpose massive VLMs by a significant margin (up to 81%), thus providing a lightweight solution to the problem of GDSII analysis.
Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 18 of its 31 references that are in the map. First posted on arXiv 28 Sep 2026.
Builds on
18 of 31 references.
References · 18
- 2024The Llama 3 Herd of Modelscited by 14,715
- 2024InternLM-XComposer2-4KHD: A Pioneering Large Vision-Language Model Handling Resolutions from 336 Pixels to 4K HDcited by 159
- 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 140
- 2023ChipGPT: How far are we from natural language hardware designcited by 105
- 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 84
- 2024ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Modelscited by 44
- 2025AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologiescited by 37
- 2024LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuitscited by 33
- 2021DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networkscited by 18
- 2024DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agentcited by 15
- 2025Enhancing Reasoning to Adapt Large Language Models for Domain-Specific Applicationscited by 8
- 2023Post-Layout Simulation Driven Analog Circuit Sizingcited by 5
6 more
- 2024Fast ML-driven Analog Circuit Layout using Reinforcement Learning and Steiner Treescited by 5
- 2024Effective Analog ICs Floorplanning with Relational Graph Neural Networks and Reinforcement Learningcited by 5
- 2025Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Searchcited by 3
- 2026OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generationcited by 3
- 2024A Deep-Learning Technique to Locate Cryptographic Operations in Side-Channel Tracescited by 2
- 2024Hound: Locating Cryptographic Primitives in Desynchronized Side-Channel Traces Using Deep-Learningcited by 2
Built on by
Not cited yet.
Similar, not cited
Close in wording, no citation either way
- 2025CIRCUIT: A Benchmark for Circuit Interpretation and Reasoning Capabilities of LLMs
- 2026THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layout
- 2025White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Design
- 2025LLM-based AI Agent for Sizing of Analog and Mixed Signal Circuit
- 2026AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models
- 2025EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit
- 2025EEsizer: LLM-Based AI Agent for Sizing of Analog and Mixed Signal Circuit
- 2024AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAG