mlsanityData to 7 Oct 2026

DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks

arXiv 2110.00211 ↗First posted 1 Oct 2021cs.LG eess.SPcited by 18

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Abstract (arXiv)

Analog circuit sizing takes a significant amount of manual effort in a typical design cycle. With rapidly developing technology and tight schedules, bringing automated solutions for sizing has attracted great attention. This paper presents DNN-Opt, a Reinforcement Learning (RL) inspired Deep Neural Network (DNN) based black-box optimization framework for analog circuit sizing. The key contributions of this paper are a novel sample-efficient two-stage deep learning optimization framework leveraging RL actor-critic algorithms, and a recipe to extend it on large industrial circuits using critical device identification. Our method shows 5--30x sample efficiency compared to other black-box optimization methods both on small building blocks and on large industrial circuits with better performance metrics. To the best of our knowledge, this is the first application of DNN-based circuit sizing on industrial scale circuits.

Key facts. Cited by 18 papers in the map (data through 7 Oct 2026). Builds on 3 of its 18 references that are in the map. First posted on arXiv 1 Oct 2021.

Builds on

3 of 18 references.

References · 3

  1. 2015Continuous control with deep reinforcement learningcited by 3,279
  2. 2020GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learningcited by 89
  3. 2020AutoCkt: Deep Reinforcement Learning of Analog Circuit Designscited by 51

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Cited by year (2026 to 7 Oct)

Citing papers per year: 2023: 1; 2024: 4; 2025: 6; 2026: 7.

18 papers.

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  1. 2024LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuitscited by 22
  2. 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 14
  3. 2024INSIGHT: Universal Neural Simulator for Analog Circuits Harnessing Autoregressive Transformerscited by 8
  4. 2025TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuitscited by 7
  5. 2025HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimizationcited by 5
  6. 2024GraCo -- A Graph Composer for Integrated Circuitscited by 2
  7. 2025DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretrainingcited by 2
  8. 2023Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networkscited by 1
  9. 2024AI-Guided Codesign Framework for Novel Material and Device Design applied to MTJ-based True Random Number Generatorscited by 1
  10. 2025Emerging ML-AI Techniques for Analog and RF EDAcited by 1
  11. 2025SPICEMixer - Netlist-Level Circuit Evolutioncited by 1
  12. 2026Report for NSF Workshop on AI for Electronic Design Automationcited by 1
6 more
  1. 2026PowerGenie: Analytically-Guided Evolutionary Discovery of Superior Reconfigurable Power Converterscited by 1
  2. 2026AMSnet-q: Unsupervised Circuit Identification and Performance Labeling for AMS Circuitscited by 0
  3. 2026Spicing up Genetic Netlist Generation with LLMscited by 0
  4. 2026AgenticSizing: A Large Language Model-based Multi-Agent Framework for Analog Circuit Sizingcited by 0
  5. 2026Inspector: Conversational and Lightweight Analyzer of Analog Circuit Layouts Using LLM and CNNscited by 0
  6. 2026THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layoutcited by 0