mlsanityData to 14 Oct 2026

THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layout

arXiv 2609.35035 ↗First posted 28 Sep 2026cs.LGcited by 0

Not on the map. Why?

Abstract (arXiv)

The integration of artificial intelligence into computer-aided design frameworks has sparked a shift in the design of analog integrated circuits (ICs), transitioning the field from using manual and algorithmic-based solutions to adopting automated and intelligent paradigms. In this scenario, the GDSII file represents the industry-standard database containing the ultimate and most accurate source of information of the analog circuit, encapsulating the complex physical geometries and parasitic realities that define tape out performance. This paper proposes THEIA, a novel dataset containing thousands of layout images paired with question-answer conversations, along with a benchmark that employs a fine-tuned vision-language model (VLM) to analyze GDSII files of analog circuits, enabling designers to interact with and query physical layouts as intuitive, meaningful entities. Experimental results using thousands of analog designs across five realistic tasks demonstrate that the proposed fine-tuned VLM outperforms state-of-the-art general-purpose VLMs by a significant margin (up to 73%), highlighting a fundamental gap between general-purpose multimodal reasoning and domain-specific layout understanding.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 18 of its 40 references that are in the map. First posted on arXiv 28 Sep 2026.

Builds on

18 of 40 references.

References · 18

  1. 2024Expanding Performance Boundaries of Open-Source Multimodal Models with Model, Data, and Test-Time Scalingcited by 1,599
  2. 2024ChatGLM: A Family of Large Language Models from GLM-130B to GLM-4 All Toolscited by 1,121
  3. 2024InternLM-XComposer2-4KHD: A Pioneering Large Vision-Language Model Handling Resolutions from 336 Pixels to 4K HDcited by 159
  4. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 140
  5. 2023ChipGPT: How far are we from natural language hardware designcited by 105
  6. 2024ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Modelscited by 44
  7. 2025AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologiescited by 37
  8. 2021DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networkscited by 18
  9. 2024AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Modelscited by 18
  10. 2024DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agentcited by 15
  11. 2025Enhancing Reasoning to Adapt Large Language Models for Domain-Specific Applicationscited by 8
  12. 2023Post-Layout Simulation Driven Analog Circuit Sizingcited by 5
6 more
  1. 2024Fast ML-driven Analog Circuit Layout using Reinforcement Learning and Steiner Treescited by 5
  2. 2024Effective Analog ICs Floorplanning with Relational Graph Neural Networks and Reinforcement Learningcited by 5
  3. 2025Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Searchcited by 3
  4. 2026OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generationcited by 3
  5. 2024A Deep-Learning Technique to Locate Cryptographic Operations in Side-Channel Tracescited by 2
  6. 2024Hound: Locating Cryptographic Primitives in Desynchronized Side-Channel Traces Using Deep-Learningcited by 2

Built on by

Not cited yet.

Similar, not cited

Close in wording, no citation either way

  1. 2026Inspector: Conversational and Lightweight Analyzer of Analog Circuit Layouts Using LLM and CNNs
  2. 2025EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit
  3. 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizing
  4. 2024DocEDA: Automated Extraction and Design of Analog Circuits from Documents with Large Language Model
  5. 2026Circuit-MLLM: Topological Logic-Guided Latent-Space Visual Reasoning for Circuit Schematic Understanding
  6. 2026AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models
  7. 2025CIRCUIT: A Benchmark for Circuit Interpretation and Reasoning Capabilities of LLMs
  8. 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence