Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Search
On the map: Deep reinforcement learning methods → RL for energy, networks and operations
Abstract (arXiv)
The layout of analog ICs requires making complex trade-offs, while addressing device physics and variability of the circuits. This makes full automation with learning-based solutions hard to achieve. However, reinforcement learning (RL) has recently reached significant results, particularly in solving the floorplanning problem. This paper presents a hybrid method that combines RL with a beam (BS) strategy. The BS algorithm enhances the agent's inference process, allowing for the generation of flexible floorplans by accomodating various objective weightings, and addressing congestion without without the need for policy retraining or fine-tuning. Moreover, the RL agent's generalization ability stays intact, along with its efficient handling of circuit features and constraints. Experimental results show approx. 5-85% improvement in area, dead space and half-perimeter wire length compared to a standard RL application, along with higher rewards for the agent. Moreover, performance and efficiency align closely with those of existing state-of-the-art techniques.
Key facts. Cited by 3 papers in the map (data through 14 Oct 2026). Placed in RL for energy, networks and operations, one of 15 directions in Deep reinforcement learning methods. Builds on 4 of its 16 references that are in the map. First posted on arXiv 8 May 2025.
Builds on
4 of 16 references.
References · 4
- 2022Simulation-guided Beam Search for Neural Combinatorial Optimizationcited by 84
- 2022MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learningcited by 43
- 2024Fast ML-driven Analog Circuit Layout using Reinforcement Learning and Steiner Treescited by 5
- 2024Effective Analog ICs Floorplanning with Relational Graph Neural Networks and Reinforcement Learningcited by 5
Built on by
Citing papers per year: 2026: 3.
3 papers.
- 2026OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generationcited by 3
- 2026Inspector: Conversational and Lightweight Analyzer of Analog Circuit Layouts Using LLM and CNNscited by 0
- 2026THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layoutcited by 0
- 2026THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layout28 Sep 2026
- 2026Inspector: Conversational and Lightweight Analyzer of Analog Circuit Layouts Using LLM and CNNs28 Sep 2026
- 2026OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generation27 Jan 2026
Similar, not cited
Close in wording, no citation either way
- 2025Advancing Routing-Awareness in Analog ICs Floorplanning
- 2026RulePlanner: All-in-One Reinforcement Learner for Unifying Design Rules in 3D Floorplanning
- 2025Late Breaking Results: Breaking Symmetry- Unconventional Placement of Analog Circuits using Multi-Level Multi-Agent Reinforcement Learning
- 2026Lighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset Points
- 2026RollPlace: Improving Macro Placement via Monte Carlo Rollout Search
- 2026ORACLE: A Multi-Objective Reinforcement Learning-Based Analog Circuit Design Optimizer with Large Language Models-Guided Exploration
- 2025AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation
- 2024Automated Placement of Analog Integrated Circuits using Priority-based Constructive Heuristic ↗