mlsanityData to 7 Oct 2026

ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Models

arXiv 2406.18770 ↗First posted 26 Jun 2024cs.LGcited by 44

Not on the map. Why?

Abstract (arXiv)

Analog circuit design requires substantial human expertise and involvement, which is a significant roadblock to design productivity. Bayesian Optimization (BO), a popular machine learning based optimization strategy, has been leveraged to automate analog design given its applicability across various circuit topologies and technologies. Traditional BO methods employ black box Gaussian Process surrogate models and optimized labeled data queries to find optimization solutions by trading off between exploration and exploitation. However, the search for the optimal design solution in BO can be expensive from both a computational and data usage point of view, particularly for high dimensional optimization problems. This paper presents ADO-LLM, the first work integrating large language models (LLMs) with Bayesian Optimization for analog design optimization. ADO-LLM leverages the LLM's ability to infuse domain knowledge to rapidly generate viable design points to remedy BO's inefficiency in finding high value design areas specifically under the limited design space coverage of the BO's probabilistic surrogate model. In the meantime, sampling of design points evaluated in the iterative BO process provides quality demonstrations for the LLM to generate high quality design points while leveraging infused broad design knowledge. Furthermore, the diversity brought by BO's exploration enriches the contextual understanding of the LLM and allows it to more broadly search in the design space and prevent repetitive and redundant suggestions. We evaluate the proposed framework on two different types of analog circuits and demonstrate notable improvements in design efficiency and effectiveness.

Key facts. Cited by 44 papers in the map (data through 7 Oct 2026). Builds on 7 of its 23 references that are in the map. First posted on arXiv 26 Jun 2024.

Builds on

7 of 23 references.

References · 7

  1. 2016Semi-Supervised Classification with Graph Convolutional Networkscited by 11,282
  2. 2022A Survey on In-context Learningcited by 717
  3. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 246
  4. 2023ChipNeMo: Domain-Adapted LLMs for Chip Designcited by 168
  5. 2023Chip-Chat: Challenges and Opportunities in Conversational Hardware Designcited by 136
  6. 2022Benchmarking Large Language Models for Automated Verilog RTL Code Generationcited by 112
  7. 2020GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learningcited by 89

Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2024: 3; 2025: 22; 2026: 19.

44 papers.

Sort:

By area:

  1. 2024LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuitscited by 22
  2. 2025AMSbench: A Comprehensive Benchmark for Evaluating MLLM Capabilities in AMS Circuitscited by 14
  3. 2025AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMscited by 14
  4. 2025Language-Based Bayesian Optimization Research Assistant (BORA)cited by 13
  5. 2025ORFS-agent: Tool-Using Agents for Chip Design Optimizationcited by 13
  6. 2025EEsizer: LLM-Based AI Agent for Sizing of Analog and Mixed Signal Circuitcited by 12
  7. 2024Schemato -- An LLM for Netlist-to-Schematic Conversioncited by 11
  8. 2025LLM-USO: Large Language Model-based Universal Sizing Optimizercited by 11
  9. 2025LLaMEA-BO: A Large Language Model Evolutionary Algorithm for Automatically Generating Bayesian Optimization Algorithmscited by 10
  10. 2025AnaFlow: Agentic LLM-based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizingcited by 10
  11. 2025AMSnet 2.0: A Large AMS Database with AI Segmentation for Net Detectioncited by 9
  12. 2025MuaLLM: A Multimodal Large Language Model Agent for Circuit Design Assistance with Hybrid Contextual Retrieval-Augmented Generationcited by 8
32 more
  1. 2025TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuitscited by 7
  2. 2025iDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMscited by 6
  3. 2025EasySize: Elastic Analog Circuit Sizing via LLM-Guided Heuristic Searchcited by 5
  4. 2025HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimizationcited by 5
  5. 2026Unleashing LLMs in Bayesian Optimization: Preference-Guided Framework for Scientific Discoverycited by 5
  6. 2026AutoSizer: Automatic Sizing of Analog and Mixed-Signal Circuits via Large Language Model (LLM) Agentscited by 4
  7. 2026LABO: LLM-Accelerated Bayesian Optimization through Broad Exploration and Selective Experimentationcited by 4
  8. 2025Generative Reliability-Based Design Optimization Using In-Context Learning Capabilities of Large Language Modelscited by 3
  9. 2025A Large Language Model-based Multi-Agent Framework for Analog Circuits' Sizing Relationships Extractioncited by 3
  10. 2026AnalogAgent: Self-Improving Analog Circuit Design Automation with LLM Agentscited by 3
  11. 2025Fine-tuning LLMs with variational Bayesian last layer for high-dimensional Bayesian optimizationcited by 2
  12. 2025AgenticTCAD: A LLM-based Multi-Agent Framework for Automated TCAD Code Generation and Device Optimizationcited by 2
  13. 2026Tree-Structured Synergy of Large Language Models and Bayesian Optimization for Efficient CASHcited by 2
  14. 2024CktGen: Automated Analog Circuit Design with Generative Artificial Intelligencecited by 1
  15. 2025BRIDGES: Bridging Graph Modality and Large Language Models within EDA Taskscited by 1
  16. 2025Emerging ML-AI Techniques for Analog and RF EDAcited by 1
  17. 2025White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Designcited by 1
  18. 2026Can an Actor-Critic Optimization Framework Improve Analog Design?cited by 1
  19. 2026Unified Audio Intelligence Without Regressing on Text Intelligencecited by 1
  20. 2026RF-Agent: A Practical Framework for Building Language Agents for RFIC Designcited by 1
  21. 2025Graph Neural Networks Based Analog Circuit Link Predictioncited by 0
  22. 2026LLM-Assisted Op-Amp Behavioral-Level Design via Agentic Human-Mimicking Reasoningcited by 0
  23. 2026A Self-Calibrating Framework for Analog Circuit Sizing Using LLM-Derived Analytical Equationscited by 0
  24. 2026Agentic Electronic Design Automation: A Handoff Perspectivecited by 0
  25. 2026AutoVSR: Automatic Visual-to-Symbolic Reasoning for Symbolic Expression Generation from Circuit Schematiccited by 0
  26. 2026Simulation-Aware In-Context Policy Improvement for LLM-Aided Analog Layout Refinementcited by 0
  27. 2026Bayesian Optimization with Rich Auxiliary Information via LLMscited by 0
  28. 2026AgenticSizing: A Large Language Model-based Multi-Agent Framework for Analog Circuit Sizingcited by 0
  29. 2026Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Taskscited by 0
  30. 2026Inspector: Conversational and Lightweight Analyzer of Analog Circuit Layouts Using LLM and CNNscited by 0
  31. 2026THEIA: A Multimodal Dataset and Benchmark for Vision-Language Analysis of Layoutcited by 0
  32. 2026Harnessing Large Language Models to Compile Task-Relevant Context into Bayesian Optimisationcited by 0