mlsanityData to 14 Oct 2026

Analog-DB: An Agent-First Analog Integrated Circuit Database, From Blocks to Systems

arXiv 2609.01286 ↗First posted 1 Sep 2026cs.AI cs.AR eess.SPcited by 0

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Abstract (arXiv)

Sharing analog integrated circuit designs remains difficult: foundry non-disclosure agreements restrict the process details a design depends on, and the testbenches behind published results are rarely released. We present analog-db, an open-source, versioned database built on a shareable design representation. A domain-specific language captures each design as a process-neutral topology, reusable testbenches, and a machine-readable datasheet under one schema, so a design is shared in full and re-simulates on the process kits it is bound to. A parameterization scheme exposes functional sub-blocks and device sizes as named parameters that carry their matching constraints, making circuits composable and retargetable; a schema-governed contract and queryable catalog let AI design agents discover and reuse them directly. Across the regulator corpus, all 23 circuit-kit bindings on three open kits meet their own recorded specification bands (typical corner, matched devices, no layout) and 10 of 23 meet a common class band. Seventeen of the 23 imported sizings failed their testbenches and closed under a gm/ID sizing loop driven by the annotated sub-block roles, typically within one to three iterations. In a supervised case study, a coding agent working from the released artifacts sized the op-amp cores of a chopper instrumentation amplifier on an open 130nm kit, locating four hand-entry defects and a missing common-mode feedback loop that the sizing-only baseline did not repair. The database holds 68 circuits across sixteen classes, verifiable at schematic level under a tiered harness and tracked on a power/performance scoreboard, released at https://github.com/MacAnalog/spicexplorer-release.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 12 of its 48 references that are in the map. First posted on arXiv 1 Sep 2026.

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12 of 48 references.

References · 12

  1. 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 84
  2. 2023CktGNN: Circuit Graph Neural Network for Electronic Design Automationcited by 58
  3. 2025AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologiescited by 37
  4. 2024Masala-CHAI: A Large-Scale SPICE Netlist Dataset for Analog Circuits by Harnessing AIcited by 18
  5. 2024AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Designcited by 9
  6. 2024AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesiscited by 9
  7. 2025AMSnet 2.0: A Large AMS Database with AI Segmentation for Net Detectioncited by 9
  8. 2025HeaRT: A Hierarchical Circuit Reasoning Tree-Based Agentic Framework for AMS Design Optimizationcited by 5
  9. 2026AutoSizer: Automatic Sizing of Analog and Mixed-Signal Circuits via Large Language Model (LLM) Agentscited by 5
  10. 2025GENIE-ASI: Generative Instruction and Executable Code for Analog Subcircuit Identificationcited by 2
  11. 2025AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experiencecited by 1
  12. 2026SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flowscited by 1

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  1. 2026AgenticSizing: A Large Language Model-based Multi-Agent Framework for Analog Circuit Sizing
  2. 2026Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Tasks
  3. 2026RFChipAgent: Multi-Agentic AI Flow for Analog/RF Chip Design
  4. 2025White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Design
  5. 2026AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models
  6. 2026OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generation
  7. 2025A Large Language Model-based Multi-Agent Framework for Analog Circuits' Sizing Relationships Extraction
  8. 2025EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit