AutoVSR: Automatic Visual-to-Symbolic Reasoning for Symbolic Expression Generation from Circuit Schematic
Not on the map. Why?
Abstract (arXiv)
Symbolic expressions can effectively characterize and predict circuit behavior, but deriving them directly from circuit schematics is challenging. This process requires accurate visual-to-symbolic construction of circuit structure from images and correct multi-step symbolic derivation, both of which impose strict correctness requirements. This work proposes AutoVSR, an automated framework for visual-to-symbolic generation of circuit expressions using Vision Language Models (VLMs). By reconstructing circuit diagrams into an executable intermediate representation (Executable IR) and leveraging a symbolic solver for reasoning, AutoVSR significantly improves the accuracy of symbolic expression generation. AutoVSR introduces two key innovations: an IR construction method guided by component rule retrieval and verification-based feedback, and a symbolic solver implemented as a planning agent equipped with a symbolic tool library for reliable multi-step derivation. Compared with end-to-end VLM approaches and specialized methods on the main symbolic expression generation task, AutoVSR achieves accuracy improvements of 30.01--59.45% and 41.96--51.84%, respectively. Moreover, AutoVSR surpasses closed-source state-of-the-art VLMs in inference cost and computational efficiency. Code is available at https://github.com/LongfeiLi1/AutoVSR.
Key facts. No citing papers in the map yet (data through 7 Oct 2026). Builds on 21 of its 39 references that are in the map. First posted on arXiv 13 Jul 2026.
Builds on
21 of 39 references.
References · 21
- 2022Chain-of-Thought Prompting Elicits Reasoning in Large Language Modelscited by 12,302
- 2017Outrageously Large Neural Networks: The Sparsely-Gated Mixture-of-Experts Layercited by 3,413
- 2023ToolLLM: Facilitating Large Language Models to Master 16000+ Real-world APIscited by 1,880
- 2022Least-to-Most Prompting Enables Complex Reasoning in Large Language Modelscited by 1,397
- 2016SPICE: Semantic Propositional Image Caption Evaluationcited by 820
- 2023Faith and Fate: Limits of Transformers on Compositionalitycited by 496
- 2025GLM-4.5V and GLM-4.1V-Thinking: Towards Versatile Multimodal Reasoning with Scalable Reinforcement Learningcited by 439
- 2021Inter-GPS: Interpretable Geometry Problem Solving with Formal Language and Symbolic Reasoningcited by 376
- 2023Is Self-Repair a Silver Bullet for Code Generation?cited by 191
- 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 82
- 2024ADO-LLM: Analog Design Bayesian Optimization with In-Context Learning of Large Language Modelscited by 44
- 2024Large Language Models Can Self-Correct with Key Condition Verificationcited by 39
9 more
- 2024LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuitscited by 22
- 2025Enhancing the Geometric Problem-Solving Ability of Multimodal LLMs via Symbolic-Neural Integrationcited by 18
- 2024AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAGcited by 16
- 2024The Dawn of AI-Native EDA: Opportunities and Challenges of Large Circuit Modelscited by 12
- 2025LLM-USO: Large Language Model-based Universal Sizing Optimizercited by 11
- 2025AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generationcited by 10
- 2025LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generationcited by 6
- 2025A Large Language Model-based Multi-Agent Framework for Analog Circuits' Sizing Relationships Extractioncited by 3
- 2025CircuitSense: A Hierarchical MLLM Benchmark Bridging Visual Comprehension and Symbolic Reasoning in Engineering Design Processcited by 3
Built on by
Not cited yet.
Similar, not cited
Close in wording, no citation either way
- 2026CircuitReason-1k: Benchmarking Long-Horizon Visual-to-Symbolic Reasoning inElectrical Circuits
- 2026SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence
- 2026Circuit-MLLM: Topological Logic-Guided Latent-Space Visual Reasoning for Circuit Schematic Understanding
- 2026From Mirage to Grounding: Towards Reliable Multimodal Circuit-to-Verilog Code Generation
- 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizing
- 2026SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence
- 2025CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design
- 2025EEschematic: Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit