mlsanityData to 14 Oct 2026

HAO: Hardware-aware neural Architecture Optimization for Efficient Inference

arXiv 2104.12766 ↗First posted 26 Apr 2021cs.CVcited by 16

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Abstract (arXiv)

Automatic algorithm-hardware co-design for DNN has shown great success in improving the performance of DNNs on FPGAs. However, this process remains challenging due to the intractable search space of neural network architectures and hardware accelerator implementation. Differing from existing hardware-aware neural architecture search (NAS) algorithms that rely solely on the expensive learning-based approaches, our work incorporates integer programming into the search algorithm to prune the design space. Given a set of hardware resource constraints, our integer programming formulation directly outputs the optimal accelerator configuration for mapping a DNN subgraph that minimizes latency. We use an accuracy predictor for different DNN subgraphs with different quantization schemes and generate accuracy-latency pareto frontiers. With low computational cost, our algorithm can generate quantized networks that achieve state-of-the-art accuracy and hardware performance on Xilinx Zynq (ZU3EG) FPGA for image classification on ImageNet dataset. The solution searched by our algorithm achieves 72.5% top-1 accuracy on ImageNet at framerate 50, which is 60% faster than MnasNet and 135% faster than FBNet with comparable accuracy.

Key facts. Cited by 16 papers in the map (data through 14 Oct 2026). Builds on 37 of its 55 references that are in the map. First posted on arXiv 26 Apr 2021.

Builds on

37 of 55 references.

References · 37

  1. 2016Densely Connected Convolutional Networkscited by 6,720
  2. 2019EfficientNet: Rethinking Model Scaling for Convolutional Neural Networkscited by 6,442
  3. 2018MobileNetV2: Inverted Residuals and Linear Bottleneckscited by 4,795
  4. 2016Xception: Deep Learning with Depthwise Separable Convolutionscited by 2,332
  5. 2018DARTS: Differentiable Architecture Searchcited by 1,798
  6. 2017Quantization and Training of Neural Networks for Efficient Integer-Arithmetic-Only Inferencecited by 1,593
  7. 2016Neural Architecture Search with Reinforcement Learningcited by 1,499
  8. 2018ShuffleNet V2: Practical Guidelines for Efficient CNN Architecture Designcited by 1,136
  9. 2016SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and <0.5MB model sizecited by 1,060
  10. 2018MnasNet: Platform-Aware Neural Architecture Search for Mobilecited by 943
  11. 2018Regularized Evolution for Image Classifier Architecture Searchcited by 909
  12. 2018Efficient Neural Architecture Search via Parameter Sharingcited by 837
25 more
  1. 2018ProxylessNAS: Direct Neural Architecture Search on Target Task and Hardwarecited by 673
  2. 2017Progressive Neural Architecture Searchcited by 487
  3. 2018FBNet: Hardware-Aware Efficient ConvNet Design via Differentiable Neural Architecture Searchcited by 485
  4. 2018HAQ: Hardware-Aware Automated Quantization with Mixed Precisioncited by 443
  5. 2019HAWQ: Hessian AWare Quantization of Neural Networks with Mixed-Precisioncited by 402
  6. 2018LQ-Nets: Learned Quantization for Highly Accurate and Compact Deep Neural Networkscited by 274
  7. 2020ZeroQ: A Novel Zero Shot Quantization Frameworkcited by 269
  8. 2019HAWQ-V2: Hessian Aware trace-Weighted Quantization of Neural Networkscited by 261
  9. 2017Incremental Network Quantization: Towards Lossless CNNs with Low-Precision Weightscited by 217
  10. 2018Mixed Precision Quantization of ConvNets via Differentiable Neural Architecture Searchcited by 125
  11. 2019Neural Predictor for Neural Architecture Searchcited by 118
  12. 2017Adaptive Quantization for Deep Neural Networkcited by 67
  13. 2020HAWQV3: Dyadic Neural Network Quantizationcited by 60
  14. 2019Hardware/Software Co-Exploration of Neural Architecturescited by 50
  15. 2019FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edgecited by 48
  16. 2019Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Searchcited by 38
  17. 2020EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutionscited by 36
  18. 2020Best of Both Worlds: AutoML Codesign of a CNN and its Hardware Acceleratorcited by 30
  19. 2020A Semi-Supervised Assessor of Neural Architecturescited by 28
  20. 2019Sample-Efficient Neural Architecture Search by Learning Action Spacecited by 23
  21. 2020Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search with Hot Startcited by 22
  22. 2018Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAscited by 18
  23. 2019On Neural Architecture Search for Resource-Constrained Hardware Platformscited by 18
  24. 2019NAIS: Neural Architecture and Implementation Search and its Applications in Autonomous Drivingcited by 9
  25. 2019Constrained deep neural network architecture search for IoT devices accounting hardware calibrationcited by 6

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2021: 3; 2022: 2; 2023: 7; 2024: 1; 2025: 2; 2026: 1.

16 papers.

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  1. 2021Applications and Techniques for Fast Machine Learning in Sciencecited by 32
  2. 2025Vision Transformers on the Edge: A Comprehensive Survey of Model Compression and Acceleration Strategiescited by 24
  3. 2023AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computingcited by 10
  4. 2022Analysis of Quantization on MLP-based Vision Modelscited by 5
  5. 2023M4BRAM: Mixed-Precision Matrix-Matrix Multiplication in FPGA Block RAMscited by 5
  6. 2024Achieving Peak Performance for Large Language Models: A Systematic Reviewcited by 4
  7. 2025MetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Accelerationcited by 4
  8. 2023MetaML: Automating Customizable Cross-Stage Design-Flow for Deep Learning Accelerationcited by 3
  9. 2023DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAscited by 3
  10. 2021How to Reach Real-Time AI on Consumer Devices? Solutions for Programmable and Custom Architecturescited by 2
  11. 2021Algorithm and Hardware Co-design for Reconfigurable CNN Acceleratorcited by 2
  12. 2023DyBit: Dynamic Bit-Precision Numbers for Efficient Quantized Neural Network Inferencecited by 2
4 more
  1. 2023End-to-end codesign of Hessian-aware quantized neural networks for FPGAs and ASICscited by 2
  2. 2023End-to-End Neural Network Compression via fracℓ1ℓ2 Regularized Latency Surrogatescited by 1
  3. 2026Continuous-Flow Data-Rate-Aware CNN Inference on FPGAcited by 1
  4. 2022UnrealNAS: Can We Search Neural Architectures with Unreal Data?cited by 0

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  1. 2024Exploring Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators
  2. 2023Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference
  3. 2022QADAM: Quantization-Aware DNN Accelerator Modeling for Pareto-Optimality
  4. 2023A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge
  5. 2022BARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU
  6. 2025JAQ: Joint Efficient Architecture Design and Low-Bit Quantization with Hardware-Software Co-Exploration
  7. 2022HQNAS: Auto CNN deployment framework for joint quantization and architecture search
  8. 2025A Scalable FPGA Architecture With Adaptive Memory Utilization for GEMM-Based Operations