mlsanityData to 14 Oct 2026

EDD: Efficient Differentiable DNN Architecture and Implementation Co-search for Embedded AI Solutions

arXiv 2005.02563 ↗First posted 6 May 2020cs.LGcited by 36

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Abstract (arXiv)

High quality AI solutions require joint optimization of AI algorithms and their hardware implementations. In this work, we are the first to propose a fully simultaneous, efficient differentiable DNN architecture and implementation co-search (EDD) methodology. We formulate the co-search problem by fusing DNN search variables and hardware implementation variables into one solution space, and maximize both algorithm accuracy and hardware implementation quality. The formulation is differentiable with respect to the fused variables, so that gradient descent algorithm can be applied to greatly reduce the search time. The formulation is also applicable for various devices with different objectives. In the experiments, we demonstrate the effectiveness of our EDD methodology by searching for three representative DNNs, targeting low-latency GPU implementation and FPGA implementations with both recursive and pipelined architectures. Each model produced by EDD achieves similar accuracy as the best existing DNN models searched by neural architecture search (NAS) methods on ImageNet, but with superior performance obtained within 12 GPU-hour searches. Our DNN targeting GPU is 1.40x faster than the state-of-the-art solution reported in Proxyless, and our DNN targeting FPGA delivers 1.45x higher throughput than the state-of-the-art solution reported in DNNBuilder.

Key facts. Cited by 36 papers in the map (data through 14 Oct 2026). First posted on arXiv 6 May 2020.

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Citing papers per year: 2021: 15; 2022: 8; 2023: 6; 2024: 3; 2025: 1; 2026: 3.

36 papers.

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  1. 2023ZiCo: Zero-shot NAS via Inverse Coefficient of Variation on Gradientscited by 58
  2. 2024Lightweight Deep Learning for Resource-Constrained Environments: A Surveycited by 38
  3. 2021NAAS: Neural Accelerator Architecture Searchcited by 24
  4. 2021A Full-Stack Search Technique for Domain Optimized Deep Learning Acceleratorscited by 19
  5. 2021Uncertainty Modeling of Emerging Device-based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Searchcited by 17
  6. 2021HAO: Hardware-aware neural Architecture Optimization for Efficient Inferencecited by 16
  7. 2021G-CoS: GNN-Accelerator Co-Search Towards Both Better Accuracy and Efficiencycited by 15
  8. 2021Generic Neural Architecture Search via Regressioncited by 14
  9. 2021Enabling Design Methodologies and Future Trends for Edge AI: Specialization and Co-designcited by 13
  10. 2021Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Acceleratorscited by 12
  11. 2021FLASH: Fast Neural Architecture Search with Hardware Optimizationcited by 11
  12. 2022EF-Train: Enable Efficient On-device CNN Training on FPGA Through Data Reshaping for Online Adaptation or Personalizationcited by 9
24 more
  1. 2024FL-NAS: Towards Fairness of NAS for Resource Constrained Devices via Large Language Modelscited by 9
  2. 2021RADARS: Memory Efficient Reinforcement Learning Aided Differentiable Neural Architecture Searchcited by 8
  3. 2023Enabling Resource-efficient AIoT System with Cross-level Optimization: A surveycited by 8
  4. 2021LENS: Layer Distribution Enabled Neural Architecture Search in Edge-Cloud Hierarchiescited by 5
  5. 2022CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Frameworkcited by 5
  6. 2021Software/Hardware Co-design for Multi-modal Multi-task Learning in Autonomous Systemscited by 4
  7. 2021A3C-S: Automated Agent Accelerator Co-Search towards Efficient Deep Reinforcement Learningcited by 3
  8. 2022RT-DNAS: Real-time Constrained Differentiable Neural Architecture Search for 3D Cardiac Cine MRI Segmentationcited by 3
  9. 2023DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAscited by 3
  10. 2021RT-RCG: Neural Network and Accelerator Search Towards Effective and Real-time ECG Reconstruction from Intracardiac Electrogramscited by 2
  11. 2021Algorithm and Hardware Co-design for Reconfigurable CNN Acceleratorcited by 2
  12. 2022PolyMPCNet: Towards ReLU-free Neural Architecture Search in Two-party Computation Based Private Inferencecited by 2
  13. 2023Edge-InversionNet: Enabling Efficient Inference of InversionNet on Edge Devicescited by 2
  14. 2024MCU-MixQ: A HW/SW Co-optimized Mixed-precision Neural Network Design Framework for MCUscited by 2
  15. 2026AI+HW 2035: Shaping the Next Decadecited by 1
  16. 2022Compilation and Optimizations for Efficient Machine Learning on Embedded Systemscited by 0
  17. 2022Chimera: A Hybrid Machine Learning Driven Multi-Objective Design Space Exploration Tool for FPGA High-Level Synthesiscited by 0
  18. 2022HiKonv: Maximizing the Throughput of Quantized Convolution With Novel Bit-wise Management and Computationcited by 0
  19. 2022FAQS: Communication-efficient Federate DNN Architecture and Quantization Co-Search for personalized Hardware-aware Preferencescited by 0
  20. 2023Enabling Hard Constraints in Differentiable Neural Network and Accelerator Co-Explorationcited by 0
  21. 2023TIPS: Topologically Important Path Sampling for Anytime Neural Networkscited by 0
  22. 2025Exploring Deep-to-Shallow Transformable Neural Networks for Intelligent Embedded Systemscited by 0
  23. 2026HERCULES: Hardware-Efficient, Robust, Continual Learning Neural Architecture Searchcited by 0
  24. 2026A3C3: AI Algorithm and Accelerator Co-design, Co-search, and Co-generationcited by 0