mlsanityData to 14 Oct 2026

A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge

arXiv 2309.08186 ↗First posted 15 Sep 2023cs.AR cs.LGcited by 11

Not on the map. Why?

Abstract (arXiv)

Extreme edge platforms, such as in-vehicle smart devices, require efficient deployment of quantized deep neural networks (DNNs) to enable intelligent applications with limited amounts of energy, memory, and computing resources. However, many edge devices struggle to boost inference throughput of various quantized DNNs due to the varying quantization levels, and these devices lack floating-point (FP) support for on-device learning, which prevents them from improving model accuracy while ensuring data privacy. To tackle the challenges above, we propose a precision-scalable RISC-V DNN processor with on-device learning capability. It facilitates diverse precision levels of fixed-point DNN inference, spanning from 2-bit to 16-bit, and enhances on-device learning through improved support with FP16 operations. Moreover, we employ multiple methods such as FP16 multiplier reuse and multi-precision integer multiplier reuse, along with balanced mapping of FPGA resources, to significantly improve hardware resource utilization. Experimental results on the Xilinx ZCU102 FPGA show that our processor significantly improves inference throughput by 1.6~14.6× and energy efficiency by 1.1~14.6× across various DNNs, compared to the prior art, XpulpNN. Additionally, our processor achieves a 16.5× higher FP throughput for on-device learning.

Key facts. Cited by 11 papers in the map (data through 14 Oct 2026). Builds on 10 of its 25 references that are in the map. First posted on arXiv 15 Sep 2023.

Builds on

10 of 25 references.

References · 10

  1. 2017Mixed Precision Trainingcited by 1,156
  2. 2021Post-Training Quantization for Vision Transformercited by 278
  3. 2015Quantized Convolutional Neural Networks for Mobile Devicescited by 215
  4. 2017Bit Fusion: Bit-Level Dynamically Composable Architecture for Accelerating Deep Neural Networkscited by 109
  5. 2020Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Frameworkcited by 27
  6. 2022BEBERT: Efficient and Robust Binary Ensemble BERTcited by 14
  7. 2020XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Network on RISC-V based IoT End Nodescited by 7
  8. 2022RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCscited by 7
  9. 2022BARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPUcited by 6
  10. 2022Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Modecited by 4

Built on by

Cited by year (2026 to 14 Oct)

Citing papers per year: 2024: 5; 2025: 5; 2026: 1.

11 papers.

  1. 2024Anda: Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Formatcited by 9
  2. 2025Neural Network Quantization for Microcontrollers: A Comprehensive Survey of Methods, Platforms, and Applicationscited by 7
  3. 2024Efficient Arbitrary Precision Acceleration for Large Language Models on GPU Tensor Corescited by 4
  4. 2024Co-Designing Binarized Transformer and Hardware Accelerator for Efficient End-to-End Edge Deploymentcited by 2
  5. 2024SPEED: A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inferencecited by 2
  6. 2025APT-LLM: Exploiting Arbitrary-Precision Tensor Core Computing for LLM Accelerationcited by 1
  7. 2025Automating Hardware Design and Verification from Architectural Papers via a Neural-Symbolic Graph Frameworkcited by 1
  8. 2024CycleBNN: Cyclic Precision Training in Binary Neural Networkscited by 0
  9. 2025Enable Lightweight and Precision-Scalable Posit/IEEE-754 Arithmetic in RISC-V Cores for Transprecision Computingcited by 0
  10. 2025Precision-Scalable Microscaling Datapaths with Optimized Reduction Tree for Efficient NPU Integrationcited by 0
  11. 2026A Scheduling Framework for Efficient MoE Inference on Edge GPU-NDP Systemscited by 0

Similar, not cited

Close in wording, no citation either way

  1. 2024A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference
  2. 2025MaRVIn: A Cross-Layer Mixed-Precision RISC-V Framework for DNN Inference, from ISA Extension to Hardware Acceleration
  3. 2023A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks
  4. 2023DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training
  5. 2024On-Device Training of Fully Quantized Deep Neural Networks on Cortex-M Microcontrollers
  6. 2023Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference
  7. 2021HAO: Hardware-aware neural Architecture Optimization for Efficient Inference
  8. 2021Development of Quantized DNN Library for Exact Hardware Emulation