AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis
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Abstract (arXiv)
Recent advances in machine learning (ML) for automating analog circuit synthesis have been significant, yet challenges remain. A critical gap is the lack of a standardized evaluation framework, compounded by various process design kits (PDKs), simulation tools, and a limited variety of circuit topologies. These factors hinder direct comparisons and the validation of algorithms. To address these shortcomings, we introduced AnalogGym, an open-source testing suite designed to provide fair and comprehensive evaluations. AnalogGym includes 30 circuit topologies in five categories: sensing front ends, voltage references, low dropout regulators, amplifiers, and phase-locked loops. It supports several technology nodes for academic and commercial applications and is compatible with commercial simulators such as Cadence Spectre, Synopsys HSPICE, and the open-source simulator Ngspice. AnalogGym standardizes the assessment of ML algorithms in analog circuit synthesis and promotes reproducibility with its open datasets and detailed benchmark specifications. AnalogGym's user-friendly design allows researchers to easily adapt it for robust, transparent comparisons of state-of-the-art methods, while also exposing them to real-world industrial design challenges, enhancing the practical relevance of their work. Additionally, we have conducted a comprehensive comparison study of various analog sizing methods on AnalogGym, highlighting the capabilities and advantages of different approaches. AnalogGym is available in the GitHub repository https://github.com/CODA-Team/AnalogGym. The documentation is also available at http://coda-team.github.io/AnalogGym/.
Key facts. Cited by 8 papers in the map (data through 7 Oct 2026). First posted on arXiv 13 Sep 2024.
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Citing papers per year: 2025: 4; 2026: 4.
8 papers.
- 2025FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Designcited by 4
- 2025DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretrainingcited by 2
- 2025ZeroSim: Zero-Shot Analog Circuit Evaluation with Unified Transformer Embeddingscited by 2
- 2025AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experiencecited by 1
- 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizingcited by 0
- 2026Lighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset Pointscited by 0
- 2026Analog-DB: An Agent-First Analog Integrated Circuit Database, From Blocks to Systemscited by 0
- 2026Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Taskscited by 0
- 2026Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Tasks27 Sep 2026
- 2026Analog-DB: An Agent-First Analog Integrated Circuit Database, From Blocks to Systems1 Sep 2026
- 2026Lighthouse RL: Sample-Efficient Circuit Optimization via Strategic Reset Points15 Jul 2026
- 2026VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizing12 Jan 2026
- 2025AnalogSAGE: Self-evolving Analog Design Multi-Agents with Stratified Memory and Grounded Experience27 Dec 2025
- 2025ZeroSim: Zero-Shot Analog Circuit Evaluation with Unified Transformer Embeddings10 Nov 2025
- 2025FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design28 May 2025
- 2025DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining13 Feb 2025