mlsanityData to 14 Oct 2026

POET: Power-Oriented Evolutionary Tuning for LLM-Based RTL PPA Optimization

arXiv 2603.19333 ↗First posted 19 Mar 2026cs.AR cs.AIcited by 11

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Abstract (arXiv)

Applying large language models (LLMs) to RTL code optimization for improved power, performance, and area (PPA) faces two key challenges: ensuring functional correctness of optimized designs despite LLM hallucination, and systematically prioritizing power reduction within the multi-objective PPA trade-off space. We propose POET (Power-Oriented Evolutionary Tuning), a framework that addresses both challenges. For functional correctness, POET introduces a differential-testing-based testbench generation pipeline that treats the original design as a functional oracle, using deterministic simulation to produce golden references and eliminating LLM hallucination from the verification process. For PPA optimization, POET employs an LLM-driven evolutionary mechanism with non-dominated sorting, power-first intra-level ranking, and proportional survivor selection to steer the search toward the low-power region of the Pareto front without manual weight tuning. Evaluated on the RTL-OPT benchmark across 40 diverse RTL designs, POET achieves 100% functional correctness, the best power on all 40 designs, and competitive area and delay improvements.

Key facts. Cited by 11 papers in the map (data through 14 Oct 2026). Builds on 11 of its 33 references that are in the map. First posted on arXiv 19 Mar 2026.

Builds on

11 of 33 references.

References · 11

  1. 2023VerilogEval: Evaluating Large Language Models for Verilog Code Generationcited by 252
  2. 2024Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generationcited by 45
  3. 2025A Survey of Research in Large Language Models for Electronic Design Automationcited by 41
  4. 2024TS-Reasoner: Domain-Oriented Time Series Inference Agents for Reasoning and Automated Analysiscited by 29
  5. 2025VFlow: Discovering Optimal Agentic Workflows for Verilog Generationcited by 19
  6. 2025SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoningcited by 16
  7. 2025VeriMoA: A Mixture-of-Agents Framework for Spec-to-HDL Generationcited by 15
  8. 2026Self-Compression of Chain-of-Thought via Multi-Agent Reinforcement Learningcited by 13
  9. 2025The Dawn of Agentic EDA: A Survey of Autonomous Digital Chip Designcited by 7
  10. 2026EvolVE: Evolutionary Search for LLM-based Verilog Generation and Optimizationcited by 7
  11. 2024A Structure-Aware Framework for Learning Device Placements on Computation Graphscited by 3

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Cited by year (2026 to 14 Oct)

Citing papers per year: 2026: 11.

11 papers.

  1. 2026Dr. RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvementcited by 6
  2. 2026RaMem: Contextual Reinstatement for Long-term Agentic Memorycited by 6
  3. 2026COEVO: Co-Evolutionary Framework for Joint Functional Correctness and PPA Optimization in LLM-Based RTL Generationcited by 3
  4. 2026ReM-MoA: Reasoning Memory Sustains Mixture-of-Agents Scalingcited by 2
  5. 2026ARES: Adaptive Reasoning-Effort Steering for PPA- and Cost-Aware RTL Optimization with LLM Agentscited by 1
  6. 2026SynCo: Data Synthesis Co-Training for Self-Evolving LLMs via Multi-Agent Reinforcement Learningcited by 1
  7. 2026TimeMM: Time-as-Operator Spectral Filtering for Dynamic Multimodal Recommendationcited by 0
  8. 2026AUTOGATE: Automated Clock Gating via Toggling-Aware LLM-based RTL Rewritingcited by 0
  9. 2026ChipMEM: Verification-Grounded Memory for EDA Agentscited by 0
  10. 2026BEHAVE: Functional Behavior Modeling Enables Self-Improving Agents for Hardware Design and Verificationcited by 0
  11. 2026Beyond Final Accuracy: Auditing Communication in LLM Multi-Agent Systemscited by 0