mlsanityData to 14 Oct 2026

Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators

arXiv 2603.03880 ↗First posted 4 Mar 2026cs.AR cs.AI cs.ETcited by 0

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Abstract (arXiv)

Software-hardware co-design is essential for optimizing in-memory computing (IMC) hardware accelerators for neural networks. However, most existing optimization frameworks target a single workload, leading to highly specialized hardware designs that do not generalize well across models and applications. In contrast, practical deployment scenarios require a single IMC platform that can efficiently support multiple neural network workloads. This work presents a joint hardware-workload co-optimization framework based on an optimized evolutionary algorithm for designing generalized IMC accelerator architectures. By explicitly capturing cross-workload trade-offs rather than optimizing for a single model, the proposed approach significantly reduces the performance gap between workload-specific and generalized IMC designs. The framework is evaluated on both RRAM- and SRAM-based IMC architectures, demonstrating strong robustness and adaptability across diverse design scenarios. Compared to baseline methods, the optimized designs achieve energy-delay-area product (EDAP) reductions of up to 76.2% and 95.5% when optimizing across a small set (4 workloads) and a large set (9 workloads), respectively. The source code of the framework is available at https://github.com/OlgaKrestinskaya/JointHardwareWorkloadOptimizationIMC.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 24 of its 71 references that are in the map. First posted on arXiv 4 Mar 2026.

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References · 24

  1. 2020pymoo: Multi-objective Optimization in Pythoncited by 200
  2. 2023Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based acceleratorscited by 43
  3. 2021A flexible and fast PyTorch toolkit for simulating training and inference on analog crossbar arrayscited by 39
  4. 2020DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Trainingcited by 33
  5. 2019Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Acceleratorscited by 32
  6. 2024A Survey: Collaborative Hardware and Software Design in the Era of Large Language Modelscited by 23
  7. 2025PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing Systemcited by 20
  8. 2021Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noisecited by 12
  9. 2021FLASH: Fast Neural Architecture Search with Hardware Optimizationcited by 11
  10. 2023AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computingcited by 10
  11. 2024CiMLoop: A Flexible, Accurate, and Fast Compute-In-Memory Modeling Toolcited by 10
  12. 2024Fire-Flyer AI-HPC: A Cost-Effective Software-Hardware Co-Design for Deep Learningcited by 8
12 more
  1. 2021Resistive Neural Hardware Acceleratorscited by 6
  2. 2022In-memory Associative Processors: Tutorial, Potential, and Challengescited by 6
  3. 2023XPert: Peripheral Circuit & Neural Architecture Co-search for Area and Energy-efficient Xbar-based Computingcited by 6
  4. 2023Towards Efficient In-memory Computing Hardware for Quantized Neural Networks: State-of-the-art, Open Challenges and Perspectivescited by 5
  5. 2023Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inferencecited by 3
  6. 2025Hardware/Software Co-Design of RISC-V Extensions for Accelerating Sparse DNNs on FPGAscited by 3
  7. 2024Towards Efficient IMC Accelerator Design Through Joint Hardware-Workload Co-optimizationcited by 2
  8. 2025COMPASS: A Compiler Framework for Resource-Constrained Crossbar-Array Based In-Memory Deep Learning Acceleratorscited by 2
  9. 2022Thermal Heating in ReRAM Crossbar Arrays: Challenges and Solutionscited by 1
  10. 2024EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Explorationcited by 1
  11. 2024Fast-OverlaPIM: A Fast Overlap-driven Mapping Framework for Processing In-Memory Neural Network Accelerationcited by 1
  12. 2025CIMNAS: A Joint Framework for Compute-In-Memory-Aware Neural Architecture Searchcited by 1

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