mlsanityData to 7 Oct 2026

Fire-Flyer AI-HPC: A Cost-Effective Software-Hardware Co-Design for Deep Learning

arXiv 2408.14158 ↗First posted 26 Aug 2024cs.DC cs.AIcited by 8

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Abstract (arXiv)

The rapid progress in Deep Learning (DL) and Large Language Models (LLMs) has exponentially increased demands of computational power and bandwidth. This, combined with the high costs of faster computing chips and interconnects, has significantly inflated High Performance Computing (HPC) construction costs. To address these challenges, we introduce the Fire-Flyer AI-HPC architecture, a synergistic hardware-software co-design framework and its best practices. For DL training, we deployed the Fire-Flyer 2 with 10,000 PCIe A100 GPUs, achieved performance approximating the DGX-A100 while reducing costs by half and energy consumption by 40%. We specifically engineered HFReduce to accelerate allreduce communication and implemented numerous measures to keep our Computation-Storage Integrated Network congestion-free. Through our software stack, including HaiScale, 3FS, and HAI-Platform, we achieved substantial scalability by overlapping computation and communication. Our system-oriented experience from DL training provides valuable insights to drive future advancements in AI-HPC.

Key facts. Cited by 8 papers in the map (data through 7 Oct 2026). Builds on 30 of its 106 references that are in the map. First posted on arXiv 26 Aug 2024.

Builds on

30 of 106 references.

References · 30

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18 more
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Built on by

Cited by year (2026 to 7 Oct)

Citing papers per year: 2025: 4; 2026: 4.

8 papers.