PRO-V-R1: Reasoning Enhanced Programming Agent for RTL Verification
On the map: LLM reasoning → Reasoning for agents, planning and code
also in 1 more
Abstract (arXiv)
Register-Transfer Level (RTL) verification is a primary bottleneck, consuming 60-70% of development time. While Large Language Models (LLMs) show promise for RTL automation, their performance and research focus have overwhelmingly centered on RTL generation rather than verification. Current methods for RTL verification rely on large scale proprietary models (e.g., GPT-4o) to generate Python-based functional references, incurring a high cost and raising data-privacy risks. To date, an end-to-end open-source solution for autonomous verification remains absent. We introduce PRO-V-R1, the first trainable open-source agentic framework for autonomous RTL verification. Our contributions are threefold: (1) we design PRO-V sys, a modular agentic system that couples LLM-based reasoning with programmatic tool use for RTL verification; (2) we establish a data construction pipeline that leverages existing RTL datasets to build simulation-validated, expert-level trajectories tailored for supervised fine-tuning (SFT) RTL verification agents; and (3) we implement an efficient reinforcement learning (RL) algorithm that uses verification-specific rewards derived from program-tool feedback to optimize the end-to-end verification workflow. Our empirical evaluation demonstrates PRO-V-R1 achieves a 57.7% functional correctness rate and 34.0% in robust fault detection, significantly outperforming the base model's 25.7% and 21.8% (respectively) from the state-of-the-art (SOTA) automatic verification system. This configuration also outperforms large-scale proprietary LLMs in functional correctness and shows comparable robustness for fault detection.
Key facts. Cited by 7 papers in the map (data through 14 Oct 2026). Placed in Reasoning for agents, planning and code, one of 17 directions in LLM reasoning. Builds on 15 of its 41 references that are in the map. First posted on arXiv 13 Jun 2025.
Builds on
15 of 41 references.
Closest ancestors · 1
Same direction, newest first
Other references · 14
- 2024DeepSeekMath: Pushing the Limits of Mathematical Reasoning in Open Language Modelscited by 9,379
- 2021Evaluating Large Language Models Trained on Codecited by 8,320
- 2025DeepSeek-R1: Incentivizing Reasoning Capability in LLMs via Reinforcement Learningcited by 6,330
- 2023Toolformer: Language Models Can Teach Themselves to Use Toolscited by 4,182
- 2023WebArena: A Realistic Web Environment for Building Autonomous Agentscited by 2,006
- 2022Program of Thoughts Prompting: Disentangling Computation from Reasoning for Numerical Reasoning Taskscited by 1,076
- 2024The AI Scientist: Towards Fully Automated Open-Ended Scientific Discoverycited by 1,071
- 2022PAL: Program-aided Language Modelscited by 652
- 2023ChemCrow: Augmenting large-language models with chemistry toolscited by 631
- 2024Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generationcited by 45
- 2024CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarizationcited by 38
- 2024CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Designcited by 24
Built on by
Citing papers per year: 2025: 1; 2026: 6.
7 papers.
- 2026LLM4Cov: Execution-Aware Agentic Learning for High-coverage Testbench Generationcited by 5
- 2025Faver: Boosting LLM-based RTL Generation with Function Abstracted Verifiable Middlewarecited by 1
- 2026Agentic Electronic Design Automation: A Handoff Perspectivecited by 0
- 2026AgentDV: Closed-Loop Agentic AI for Hardware Design Verificationcited by 0
- 2026CovR: Coverage-Aware Hardware Verification via Reasoning-Guided Reinforcement Learningcited by 0
- 2026BEHAVE: Functional Behavior Modeling Enables Self-Improving Agents for Hardware Design and Verificationcited by 0
- 2026A Survey on LLM-Integrated Hardware Design Verificationcited by 0
- 2026A Survey on LLM-Integrated Hardware Design Verification6 Oct 2026
- 2026BEHAVE: Functional Behavior Modeling Enables Self-Improving Agents for Hardware Design and Verification28 Sep 2026
- 2026CovR: Coverage-Aware Hardware Verification via Reasoning-Guided Reinforcement Learning15 Sep 2026
- 2026AgentDV: Closed-Loop Agentic AI for Hardware Design Verification27 Aug 2026
- 2026Agentic Electronic Design Automation: A Handoff Perspective18 Jun 2026
- 2026LLM4Cov: Execution-Aware Agentic Learning for High-coverage Testbench Generation18 Feb 2026
- 2025Faver: Boosting LLM-based RTL Generation with Function Abstracted Verifiable Middleware9 Oct 2025
Similar, not cited
Close in wording, no citation either way
- 2026ChipCraftBrain: Validation-First RTL Generation via Multi-Agent Orchestration
- 2024MAGE: A Multi-Agent Engine for Automated RTL Code Generation
- 2025PEFA-AI: Advancing Open-source LLMs for RTL generation using Progressive Error Feedback Agentic-AI
- 2026ChipMATE: Multi-Agent Training via Reinforcement Learning for Enhanced RTL Generation
- 2025Automated Multi-Agent Workflows for RTL Design
- 2026ACE-RTL: When Agentic Context Evolution Meets RTL-Specialized LLMs
- 2024EDA-Aware RTL Generation with Large Language Models
- 2026RTL-BenchLS: A Large-Scale Benchmark for RTL Reasoning and Generation with Large Language Models