mlsanityData to 14 Oct 2026

CHORUS: Complementary Experts for High-Coverage Testbench Stimulus Generation

arXiv 2608.10090 ↗First posted 10 Aug 2026cs.AI cs.LGcited by 0

Not on the map. Why?

Abstract (arXiv)

Large language models (LLMs) have advanced code generation, where executable feedback provides a more reliable learning signal than textual imitation alone. Hardware verification is an important application of code generation and accounts for a substantial fraction of modern chip design effort, with high-coverage testbench stimulus generation as a key task. We present CHORUS, a post-training framework that pushes performance beyond what a conventional supervised fine-tuning (SFT)-to-reinforcement learning (RL) pipeline achieves. CHORUS builds on two observations. First, staged SFT produces behaviorally diverse checkpoints, and dense-reward RL turns them into strong experts with comparable aggregate performance but distinct task-level strengths. Second, these complementary strengths can be exploited through either training-free model merging or further post-training to outperform the best individual expert. By consolidating the resulting specialists into a single 4B model, CHORUS achieves 88.0% Pass@1 on CVDP-ECov, outperforming DeepSeek-R1 (671B) by 13.5 percentage points.

Key facts. No citing papers in the map yet (data through 14 Oct 2026). Builds on 21 of its 26 references that are in the map. First posted on arXiv 10 Aug 2026.

Builds on

21 of 26 references.

References · 21

  1. 2015Distilling the Knowledge in a Neural Networkcited by 10,324
  2. 2024DeepSeekMath: Pushing the Limits of Mathematical Reasoning in Open Language Modelscited by 9,379
  3. 2025DAPO: An Open-Source LLM Reinforcement Learning System at Scalecited by 2,810
  4. 2021Merging Models with Fisher-Weighted Averagingcited by 621
  5. 2015Policy Distillationcited by 440
  6. 2023Rewarded soups: towards Pareto-optimal alignment by interpolating weights fine-tuned on diverse rewardscited by 243
  7. 2024WARM: On the Benefits of Weight Averaged Reward Modelscited by 147
  8. 2024VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Toolcited by 85
  9. 2024DELLA-Merging: Reducing Interference in Model Merging through Magnitude-Based Samplingcited by 81
  10. 2021Adaptive Multi-Teacher Multi-level Knowledge Distillationcited by 72
  11. 2023RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solutioncited by 71
  12. 2020Reinforced Multi-Teacher Selection for Knowledge Distillationcited by 63
9 more
  1. 2024AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Designcited by 41
  2. 2025QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generationcited by 35
  3. 2024MAGE: A Multi-Agent Engine for Automated RTL Code Generationcited by 31
  4. 2026KL for a KL: On-Policy Distillation with Control Variate Baselinecited by 26
  5. 2024CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Designcited by 24
  6. 2025Superficial Self-Improved Reasoners Benefit from Model Mergingcited by 16
  7. 2025VeriCoder: Enhancing LLM-Based RTL Code Generation through Functional Correctness Validationcited by 13
  8. 2026LLM4Cov: Execution-Aware Agentic Learning for High-coverage Testbench Generationcited by 5
  9. 2025Breaking Memorization Barriers in LLM Code Fine-Tuning via Information Bottleneck for Improved Generalizationcited by 1

Built on by

Not cited yet.

Similar, not cited

Close in wording, no citation either way

  1. 2026GRPO with State Mutations: Improving LLM-Based Hardware Test Plan Generation
  2. 2025Insights from Verification: Training a Verilog Generation LLM with Reinforcement Learning with Testbench Feedback
  3. 2025VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation
  4. 2026Adaptive Decoding via Test-Time Policy Learning for Self-Improving Generation
  5. 2025TB or Not TB: Coverage-Driven Direct Preference Optimization for Verilog Stimulus Generation
  6. 2026EvolveGen: Algorithmic Level Hardware Model Checking Benchmark Generation through Reinforcement Learning
  7. 2026Architectural Sampling: Test-Time Scaling via Computational Diversity in Frozen Vision-Language Models
  8. 2026CodeScaler: Scaling Code LLM Training and Test-Time Inference via Reward Models