FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design
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Abstract (arXiv)
Designing analog circuits from performance specifications is a complex, multi-stage process encompassing topology selection, parameter inference, and layout feasibility. We introduce FALCON, a unified machine learning framework that enables fully automated, specification-driven analog circuit synthesis through topology selection and layout-constrained optimization. Given a target performance, FALCON first selects an appropriate circuit topology using a performance-driven classifier guided by human design heuristics. Next, it employs a custom, edge-centric graph neural network trained to map circuit topology and parameters to performance, enabling gradient-based parameter inference through the learned forward model. This inference is guided by a differentiable layout cost, derived from analytical equations capturing parasitic and frequency-dependent effects, and constrained by design rules. We train and evaluate FALCON on a large-scale custom dataset of 1M analog mm-wave circuits, generated and simulated using Cadence Spectre across 20 expert-designed topologies. Through this evaluation, FALCON demonstrates >99% accuracy in topology inference, <10% relative error in performance prediction, and efficient layout-aware design that completes in under 1 second per instance. Together, these results position FALCON as a practical and extensible foundation model for end-to-end analog circuit design automation.
Key facts. Cited by 5 papers in the map (data through 14 Oct 2026). Builds on 16 of its 66 references that are in the map. First posted on arXiv 28 May 2025.
Builds on
16 of 66 references.
References · 16
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- 2017Physics Informed Deep Learning (Part I): Data-driven Solutions of Nonlinear Partial Differential Equationscited by 373
- 2020GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learningcited by 89
- 2024AnalogCoder: Analog Circuit Design via Training-Free Code Generationcited by 84
- 2023CktGNN: Circuit Graph Neural Network for Electronic Design Automationcited by 58
- 2020AutoCkt: Deep Reinforcement Learning of Analog Circuit Designscited by 51
- 2024LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuitscited by 33
- 2024LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Designcited by 25
- 2018Learning to Design Circuitscited by 17
- 2022Pretraining Graph Neural Networks for few-shot Analog Circuit Modeling and Designcited by 13
- 2023Learning to Design Analog Circuits to Meet Threshold Specificationscited by 9
- 2024AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Designcited by 9
4 more
- 2024AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesiscited by 9
- 2020ALIGN: A System for Automating Analog Layoutcited by 8
- 2022Domain Knowledge-Based Automated Analog Circuit Design with Deep Reinforcement Learningcited by 7
- 2025Supervised Learning for Analog and RF Circuit Design: Benchmarks and Comparative Insightscited by 5
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Citing papers per year: 2025: 2; 2026: 3.
5 papers.
- 2026ARCS: Autoregressive Circuit Synthesis with Topology-Aware Graph Attention and Spec Conditioningcited by 1
- 2025RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Predictioncited by 0
- 2025LLMs for Analog Circuit Design Continuum (ACDC)cited by 0
- 2026EM-Aware Physical Synthesis: Neural Inductor Modeling and Intelligent Placement & Routing for RF Circuitscited by 0
- 2026CktHGVAE: A Symmetric Design/State Heterogeneous Graph Variational Autoencoder for Transistor-level Analog/Mixed-signal Circuit Design and Analysiscited by 0
- 2026CktHGVAE: A Symmetric Design/State Heterogeneous Graph Variational Autoencoder for Transistor-level Analog/Mixed-signal Circuit Design and Analysis14 Oct 2026
- 2026ARCS: Autoregressive Circuit Synthesis with Topology-Aware Graph Attention and Spec Conditioning30 Mar 2026
- 2026EM-Aware Physical Synthesis: Neural Inductor Modeling and Intelligent Placement & Routing for RF Circuits12 Feb 2026
- 2025LLMs for Analog Circuit Design Continuum (ACDC)9 Dec 2025
- 2025RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Prediction22 Aug 2025